From patchwork Mon Sep 9 13:13:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 2860711 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D62D39F2D6 for ; Mon, 9 Sep 2013 13:18:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3178C20462 for ; Mon, 9 Sep 2013 13:18:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 69A1F2047B for ; Mon, 9 Sep 2013 13:18:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752615Ab3IINRJ (ORCPT ); Mon, 9 Sep 2013 09:17:09 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:52482 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752458Ab3IINRG (ORCPT ); Mon, 9 Sep 2013 09:17:06 -0400 Received: from 172.24.2.119 (EHLO szxeml209-edg.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.4-GA FastPath queued) with ESMTP id BHI25315; Mon, 09 Sep 2013 21:13:29 +0800 (CST) Received: from SZXEML404-HUB.china.huawei.com (10.82.67.59) by szxeml209-edg.china.huawei.com (172.24.2.184) with Microsoft SMTP Server (TLS) id 14.1.323.7; Mon, 9 Sep 2013 21:13:25 +0800 Received: from localhost (10.135.76.69) by szxeml404-hub.china.huawei.com (10.82.67.59) with Microsoft SMTP Server id 14.1.323.7; Mon, 9 Sep 2013 21:13:20 +0800 From: Yijing Wang To: Bjorn Helgaas , Chris Metcalf , Greg Kroah-Hartman , David Airlie , Mike Marciniszyn , Roland Dreier , Roland Dreier CC: , Mark Einon , Sean Hefty , Hal Rosenstock , , , Yijing Wang , Hanjun Guo Subject: [PATCH 2/6] title/pci: use cached pci_dev->pcie_mpss to simplify code Date: Mon, 9 Sep 2013 21:13:04 +0800 Message-ID: <1378732388-4508-3-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.11.msysgit.1 In-Reply-To: <1378732388-4508-1-git-send-email-wangyijing@huawei.com> References: <1378732388-4508-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.135.76.69] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The PCI core caches the "PCI-E Max Payload Size Supported" in pci_dev->pcie_mpss, so use that instead of pcie_capability_read_dword(). Signed-off-by: Yijing Wang --- arch/tile/kernel/pci.c | 7 ++----- 1 files changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c index 67237d3..692a799 100644 --- a/arch/tile/kernel/pci.c +++ b/arch/tile/kernel/pci.c @@ -246,15 +246,12 @@ static void fixup_read_and_payload_sizes(void) /* Scan for the smallest maximum payload size. */ for_each_pci_dev(dev) { u32 devcap; - int max_payload; if (!pci_is_pcie(dev)) continue; - pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &devcap); - max_payload = devcap & PCI_EXP_DEVCAP_PAYLOAD; - if (max_payload < smallest_max_payload) - smallest_max_payload = max_payload; + if (dev->pcie_mpss < smallest_max_payload) + smallest_max_payload = dev->pcie_mpss; } /* Now, set the max_payload_size for all devices to that value. */