From patchwork Thu Sep 12 04:03:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Cross X-Patchwork-Id: 2875611 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7555FBF43F for ; Thu, 12 Sep 2013 04:20:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2361A20279 for ; Thu, 12 Sep 2013 04:20:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0E375202DB for ; Thu, 12 Sep 2013 04:20:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753552Ab3ILEUd (ORCPT ); Thu, 12 Sep 2013 00:20:33 -0400 Received: from mail1.g1.pair.com ([66.39.3.162]:54111 "EHLO mail1.g1.pair.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753485Ab3ILEUb (ORCPT ); Thu, 12 Sep 2013 00:20:31 -0400 Received: from xobs-novena.novalocal (unknown [210.23.25.254]) by mail1.g1.pair.com (Postfix) with ESMTPSA id 5963B2C2B4; Thu, 12 Sep 2013 00:20:29 -0400 (EDT) From: Sean Cross To: devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Sascha Hauer , Sean Cross Subject: [PATCH v3 2/3] ARM: imx6q: Add PCIe bits to GPR syscon definition Date: Thu, 12 Sep 2013 04:03:30 +0000 Message-Id: <1378958611-4274-3-git-send-email-xobs@kosagi.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1378958611-4274-1-git-send-email-xobs@kosagi.com> References: <1378958611-4274-1-git-send-email-xobs@kosagi.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP PCIe requires additional bits be defined for GPR8 and GPR12. Signed-off-by: Sean Cross --- include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index b6bdcd6..1bf1fe9 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -241,6 +241,12 @@ #define IMX6Q_GPR5_L2_CLK_STOP BIT(8) +#define IMX6Q_GPR8_TX_DEEMPH_GEN1 (0x3F << 0) +#define IMX6Q_GPR8_TX_DEEMPH_GEN2_3P5DB (0x3F << 6) +#define IMX6Q_GPR8_TX_DEEMPH_GEN2_6DB (0x3F << 12) +#define IMX6Q_GPR8_TX_SWING_FULL (0x7F << 18) +#define IMX6Q_GPR8_TX_SWING_LOW (0x7F << 25) + #define IMX6Q_GPR9_TZASC2_BYP BIT(1) #define IMX6Q_GPR9_TZASC1_BYP BIT(0) @@ -273,7 +279,9 @@ #define IMX6Q_GPR12_ARMP_AHB_CLK_EN BIT(26) #define IMX6Q_GPR12_ARMP_ATB_CLK_EN BIT(25) #define IMX6Q_GPR12_ARMP_APB_CLK_EN BIT(24) +#define IMX6Q_GPR12_DEVICE_TYPE (0xF << 12) #define IMX6Q_GPR12_PCIE_CTL_2 BIT(10) +#define IMX6Q_GPR12_LOS_LEVEL (0x1F << 4) #define IMX6Q_GPR13_SDMA_STOP_REQ BIT(30) #define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29)