From patchwork Wed Oct 23 10:41:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Minghuan Lian X-Patchwork-Id: 3087761 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2F108BF924 for ; Wed, 23 Oct 2013 10:42:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E04FF2022D for ; Wed, 23 Oct 2013 10:42:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 99721202FF for ; Wed, 23 Oct 2013 10:42:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752786Ab3JWKmC (ORCPT ); Wed, 23 Oct 2013 06:42:02 -0400 Received: from ch1ehsobe004.messaging.microsoft.com ([216.32.181.184]:19774 "EHLO ch1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752760Ab3JWKmB (ORCPT ); Wed, 23 Oct 2013 06:42:01 -0400 Received: from mail103-ch1-R.bigfish.com (10.43.68.247) by CH1EHSOBE020.bigfish.com (10.43.70.77) with Microsoft SMTP Server id 14.1.225.22; Wed, 23 Oct 2013 10:42:00 +0000 Received: from mail103-ch1 (localhost [127.0.0.1]) by mail103-ch1-R.bigfish.com (Postfix) with ESMTP id C2A8A1E0263; Wed, 23 Oct 2013 10:42:00 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: -1 X-BigFish: VS-1(zz154dIzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h17326ah8275bh8275dh1de097h186068hz2dh2a8h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h1155h) Received: from mail103-ch1 (localhost.localdomain [127.0.0.1]) by mail103-ch1 (MessageSwitch) id 1382524918387561_763; Wed, 23 Oct 2013 10:41:58 +0000 (UTC) Received: from CH1EHSMHS003.bigfish.com (snatpool2.int.messaging.microsoft.com [10.43.68.233]) by mail103-ch1.bigfish.com (Postfix) with ESMTP id 4BCC8400041; Wed, 23 Oct 2013 10:41:58 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS003.bigfish.com (10.43.70.3) with Microsoft SMTP Server (TLS) id 14.16.227.3; Wed, 23 Oct 2013 10:41:58 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server (TLS) id 14.3.158.2; Wed, 23 Oct 2013 10:41:57 +0000 Received: from lmh.ap.freescale.net (lmh.ap.freescale.net [10.193.20.65]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r9NAfX79020247; Wed, 23 Oct 2013 03:41:54 -0700 From: Minghuan Lian To: CC: Zang Roy-R61911 , Scott Wood , Kumar Gala , Bjorn Helgaas , , Minghuan Lian Subject: [PATCH 07/12][v3] pci: fsl: port PCI platform driver Date: Wed, 23 Oct 2013 18:41:29 +0800 Message-ID: <1382524894-15164-7-git-send-email-Minghuan.Lian@freescale.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1382524894-15164-1-git-send-email-Minghuan.Lian@freescale.com> References: <1382524894-15164-1-git-send-email-Minghuan.Lian@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP 1. The patch ports FSL PCI platform driver. probe function initialize fsl_pci and register it to architecture PCI system, remove function removes fsl_pci from architecture PCI system. fsl_arch_pci_sys_register() and fsl_arch_pci_sys_remove() should be implemented in architecture-specific driver to provide register/remove functionality. 2. Remove architecture-specific header and unnecessary header. 3. Change Kconfig and Makefile to support FSL PCI common driver Signed-off-by: Minghuan Lian --- change log: v1-v3: Derived from http://patchwork.ozlabs.org/patch/278965/ Based on upstream master. Based on the discussion of RFC version here http://patchwork.ozlabs.org/patch/274487/ arch/powerpc/Kconfig | 1 + drivers/pci/host/Kconfig | 10 ++++++++ drivers/pci/host/Makefile | 1 + drivers/pci/host/pci-fsl-common.c | 53 +++++++++++++++++++++++++-------------- include/linux/fsl/pci-common.h | 6 +++++ 5 files changed, 52 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 38f3b7e..7447d97d 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -690,6 +690,7 @@ config FSL_SOC config FSL_PCI bool + select PCI_FSL_COMMON if FSL_SOC_BOOKE || PPC_86xx select PPC_INDIRECT_PCI select PCI_QUIRKS diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig index 3d95048..48242b33 100644 --- a/drivers/pci/host/Kconfig +++ b/drivers/pci/host/Kconfig @@ -19,4 +19,14 @@ config PCI_TEGRA bool "NVIDIA Tegra PCIe controller" depends on ARCH_TEGRA +config PCI_FSL_COMMON + bool "Common driver for Freescale PCI/PCIe controller" + depends on FSL_SOC_BOOKE || PPC_86xx + help + This driver provides common support for PCI/PCIE controller + on Freescale embedded processors 85xx/86xx/QorIQ/Layerscape. + Additional drivers must be enabled in order to provide some + architecture-dependent functions and register the controller + to PCI subsystem. + endmenu diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile index c9a997b..7c338a7 100644 --- a/drivers/pci/host/Makefile +++ b/drivers/pci/host/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_PCIE_DW) += pcie-designware.o obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o +obj-$(CONFIG_PCI_FSL_COMMON) += pci-fsl-common.o diff --git a/drivers/pci/host/pci-fsl-common.c b/drivers/pci/host/pci-fsl-common.c index e09a0ec..c7bc472 100644 --- a/drivers/pci/host/pci-fsl-common.c +++ b/drivers/pci/host/pci-fsl-common.c @@ -16,26 +16,12 @@ */ #include #include -#include -#include #include -#include #include #include -#include -#include #include #include - -#include -#include -#include -#include -#include -#include -#include -#include -#include +#include /* Indirect type */ #define INDIRECT_TYPE_EXT_REG 0x00000002 @@ -672,12 +658,40 @@ static const struct of_device_id pci_ids[] = { static int fsl_pci_probe(struct platform_device *pdev) { int ret; - struct device_node *node; + struct fsl_pci *pci; + + if (!of_device_is_available(pdev->dev.of_node)) { + dev_dbg(&pdev->dev, "disabled\n"); + return -ENODEV; + } + + pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL); + if (!pci) { + dev_err(&pdev->dev, "no memory for fsl_pci\n"); + return -ENOMEM; + } + + ret = fsl_pci_setup(pdev, pci); + if (ret) + return ret; + + ret = fsl_arch_pci_sys_register(pci); + if (ret) { + dev_err(&pdev->dev, "failed to register pcie to Arch\n"); + return ret; + } + + return 0; +} - node = pdev->dev.of_node; - ret = fsl_add_bridge(pdev, fsl_pci_primary == node); +static int fsl_pci_remove(struct platform_device *pdev) +{ + struct fsl_pci *pci = platform_get_drvdata(pdev); + + if (!pci) + return -ENODEV; - mpc85xx_pci_err_probe(pdev); + fsl_arch_pci_sys_remove(pci); return 0; } @@ -721,6 +735,7 @@ static struct platform_driver fsl_pci_driver = { .of_match_table = pci_ids, }, .probe = fsl_pci_probe, + .remove = fsl_pci_remove, }; static int __init fsl_pci_init(void) diff --git a/include/linux/fsl/pci-common.h b/include/linux/fsl/pci-common.h index 490ee53..bfb1f03 100644 --- a/include/linux/fsl/pci-common.h +++ b/include/linux/fsl/pci-common.h @@ -159,5 +159,11 @@ extern struct pci_bus *fsl_arch_fake_pci_bus(struct fsl_pci *pci, int busnr); /* Return PCI64 DMA offset */ u64 fsl_arch_pci64_dma_offset(void); +/* Register PCI/PCIe controller to architecture system */ +extern int fsl_arch_pci_sys_register(struct fsl_pci *pci); + +/* Remove PCI/PCIe controller from architecture system */ +extern void fsl_arch_pci_sys_remove(struct fsl_pci *pci); + #endif /* __PCI_COMMON_H */ #endif /* __KERNEL__ */