From patchwork Mon Dec 23 08:02:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tanmay Inamdar X-Patchwork-Id: 3396091 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3CE78C0D4A for ; Mon, 23 Dec 2013 08:09:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 78C092055B for ; Mon, 23 Dec 2013 08:09:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 940E620558 for ; Mon, 23 Dec 2013 08:09:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757047Ab3LWIJ4 (ORCPT ); Mon, 23 Dec 2013 03:09:56 -0500 Received: from exprod5og110.obsmtp.com ([64.18.0.20]:53346 "HELO exprod5og110.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1757011Ab3LWIJz (ORCPT ); Mon, 23 Dec 2013 03:09:55 -0500 Received: from mail-pd0-f171.google.com ([209.85.192.171]) (using TLSv1) by exprod5ob110.postini.com ([64.18.4.12]) with SMTP ID DSNKUrfv0+WiQu+szrFq8lRo+yMze3d3t1HS@postini.com; Mon, 23 Dec 2013 00:09:55 PST Received: by mail-pd0-f171.google.com with SMTP id z10so4884566pdj.30 for ; Mon, 23 Dec 2013 00:09:54 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=BjIH3ekRobAzj7quGagKa8w1KsnnC912EaueZ02dt+E=; b=FdYpfq70/GaSHo1uh3Rx8G7qP2TdRhkoDutmbute1aPh0qRJVUr1Ew5lP6ZEkEOoi8 zs5zds1apTPit5CVLtdiH/kow6a7Ic8wt40XzLUXu92OUHuHKdLtUVh/T89NPkMeKmlS 8utrdBKEOWDGZkxLcbxMEiJwEoDmi7Mn1hdByUZ48ZOTeuCGlbZaW+MQmSOgxiCRlIii IzHIb4opCNc0Ysrq9o5j0Y4uGnPdrO9fiXn3hG7ZZFXOxSHtcLUiTkdqp+KO+nnoR8TN SoQYmyij34B+ihy4gJ1Md5ZdHmR+Fr64hpvfhGxFeHG0AxiP6CFFM3REp3MwoLs06BUA 8FVw== X-Received: by 10.68.8.136 with SMTP id r8mr24244026pba.36.1387785763665; Mon, 23 Dec 2013 00:02:43 -0800 (PST) X-Gm-Message-State: ALoCoQmIwnkeeCghzFT3LUOC24/YkagJtK8J9YKdbjixigadR3L5se1rvTVHDbFd4JRDIDGRFmrajAiVRz5seoh/DZhUTuklrjYy4SEYOGrnfXYE1LqfQYzHrdbHcE1LkzYltggaTSiqhLdn5rc9MZNzh6s5xzcW+9u3nRv8KKEU1RwyQoBLMF4= X-Received: by 10.68.8.136 with SMTP id r8mr24244011pba.36.1387785763589; Mon, 23 Dec 2013 00:02:43 -0800 (PST) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id ql10sm32202966pbc.44.2013.12.23.00.02.39 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 23 Dec 2013 00:02:42 -0800 (PST) From: Tanmay Inamdar To: Bjorn Helgaas , Grant Likely , Catalin Marinas , Rob Landley Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, patches@apm.com, jcm@redhat.com, Tanmay Inamdar Subject: [RFC PATCH 3/3] dt-bindings: pci: xgene pcie device tree bindings Date: Mon, 23 Dec 2013 13:32:04 +0530 Message-Id: <1387785725-24262-4-git-send-email-tinamdar@apm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1387785725-24262-1-git-send-email-tinamdar@apm.com> References: <1387785725-24262-1-git-send-email-tinamdar@apm.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the bindings for X-Gene PCIe driver. The driver resides under 'drivers/pci/host/pcie-xgene.c' file. Signed-off-by: Tanmay Inamdar --- .../devicetree/bindings/pci/xgene-pcie.txt | 43 ++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/xgene-pcie.txt diff --git a/Documentation/devicetree/bindings/pci/xgene-pcie.txt b/Documentation/devicetree/bindings/pci/xgene-pcie.txt new file mode 100644 index 0000000..d92da4f --- /dev/null +++ b/Documentation/devicetree/bindings/pci/xgene-pcie.txt @@ -0,0 +1,43 @@ +* AppliedMicro X-Gene PCIe interface + +Required properties: +- status: Either "ok" or "disabled". +- device_type: set to "pci" +- compatible: should contain "xgene,pcie" to identify the core. +- reg: base addresses and lengths of the pcie controller configuration + space register. +- #address-cells: set to <3> +- #size-cells: set to <2> +- ranges: ranges for the PCI memory, I/O regions, config and MSI regions +- #interrupt-cells: set to <1> +- interrupt-map-mask and interrupt-map: standard PCI properties + to define the mapping of the PCIe interface to interrupt + numbers. +- clocks: from common clock binding: handle to pci clock. +- clock-names: from common clock binding. Should be "pcieclk". + +Example: + +SoC specific DT Entry: + pcie0: pcie@1f2b0000 { + status = "disabled"; + device_type = "pci"; + compatible = "xgene,pcie"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = < 0x00 0x1f2b0000 0x0 0x00010000>; + ranges = <0x02000000 0x0 0x00000000 0xe0 0x00000000 0x0 0x10000000 /* mem*/ + 0x01000000 0x0 0x80000000 0xe0 0x80000000 0x0 0x00010000 /* io */ + 0x00000000 0x0 0xd0000000 0xe0 0xd0000000 0x0 0x00200000 /* cfg */ + 0x00000000 0x0 0x79000000 0x00 0x79000000 0x0 0x00800000>; /* msi */ + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1>; + clocks = <&pcie0clk 0>; + clock-names = "pcieclk" + }; + +Board specific DT Entry: + &pcie0 { + status = "ok"; + };