From patchwork Wed Jan 8 05:02:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Minghuan Lian X-Patchwork-Id: 3451631 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 53AB3C02DC for ; Wed, 8 Jan 2014 05:02:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CD6EF20115 for ; Wed, 8 Jan 2014 05:02:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C9F6F200D5 for ; Wed, 8 Jan 2014 05:02:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751766AbaAHFCK (ORCPT ); Wed, 8 Jan 2014 00:02:10 -0500 Received: from ch1ehsobe005.messaging.microsoft.com ([216.32.181.185]:14097 "EHLO ch1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751104AbaAHFCJ (ORCPT ); Wed, 8 Jan 2014 00:02:09 -0500 Received: from mail88-ch1-R.bigfish.com (10.43.68.247) by CH1EHSOBE013.bigfish.com (10.43.70.63) with Microsoft SMTP Server id 14.1.225.22; Wed, 8 Jan 2014 05:02:08 +0000 Received: from mail88-ch1 (localhost [127.0.0.1]) by mail88-ch1-R.bigfish.com (Postfix) with ESMTP id 4919E4602E3; Wed, 8 Jan 2014 05:02:08 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(z551biz154dIzz1f42h2148h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h2189h1d1ah1d2ah1fc6hzz1de098h17326ah8275bh8275dh1de097h186068hz2dh2a8h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h2218h2216h226dh22d0h2327h2336h1155h) Received: from mail88-ch1 (localhost.localdomain [127.0.0.1]) by mail88-ch1 (MessageSwitch) id 1389157326148330_1331; Wed, 8 Jan 2014 05:02:06 +0000 (UTC) Received: from CH1EHSMHS037.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.243]) by mail88-ch1.bigfish.com (Postfix) with ESMTP id 197C9480054; Wed, 8 Jan 2014 05:02:06 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS037.bigfish.com (10.43.69.246) with Microsoft SMTP Server (TLS) id 14.16.227.3; Wed, 8 Jan 2014 05:02:05 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.3.158.2; Wed, 8 Jan 2014 05:02:05 +0000 Received: from lmh.ap.freescale.net (lmh.ap.freescale.net [10.193.20.65]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s0851V2M018463; Tue, 7 Jan 2014 22:02:02 -0700 From: Minghuan Lian To: CC: Zang Roy-R61911 , Scott Wood , Kumar Gala , Bjorn Helgaas , , Minghuan Lian Subject: [PATCH 11/12][v4] pci: fsl: update PCI EDAC driver Date: Wed, 8 Jan 2014 13:02:02 +0800 Message-ID: <1389157323-3088-11-git-send-email-Minghuan.Lian@freescale.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1389157323-3088-1-git-send-email-Minghuan.Lian@freescale.com> References: <1389157323-3088-1-git-send-email-Minghuan.Lian@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-FOPE-CONNECTOR: Id%0$Dn%FREESCALE.MAIL.ONMICROSOFT.COM$RO%1$TLS%0$FQDN%$TlsDn% Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, UNRESOLVED_TEMPLATE autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP 1. The pci-fsl-common driver has set fsl_pci to device as drvdata, so EDAC driver can not call dev_set_drvdata() again. fsl_pci contains regs field to point PCI CCSR, so EDAC may directly use the pointer and not need to call devm_ioremap(). 2. Add mpc85xx_pci_err_remove() to disable PCI error interrupt and delete PCI EDAC from EDAC subsystem. 3. AER uses the same IRQ, so change IRQ handling mode as shared to avoid AER can not request IRQ. Signed-off-by: Minghuan Lian --- change log: v4: Changed IRQ handling mode as shared to avoid aer can not request IRQ. v1-v3: Derived from http://patchwork.ozlabs.org/patch/278965/ Added mpc85xx_pci_err_remove() Based on upstream master. Based on the discussion of RFC version here http://patchwork.ozlabs.org/patch/274487/ arch/powerpc/sysdev/fsl_pci.h | 6 +++++ drivers/edac/mpc85xx_edac.c | 61 +++++++++++++++++++++++++------------------ drivers/edac/mpc85xx_edac.h | 1 + 4 files changed, 43 insertions(+), 26 deletions(-) diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 6d9bec4..2e3455e 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -236,6 +236,7 @@ void fsl_arch_pci_sys_remove(struct fsl_pci *pci) if (!hose) return; + mpc85xx_pci_err_remove(to_platform_device(pci->dev)); pcibios_free_controller(hose); } diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h index ce77aad..ae4dbe2 100644 --- a/arch/powerpc/sysdev/fsl_pci.h +++ b/arch/powerpc/sysdev/fsl_pci.h @@ -35,11 +35,17 @@ static inline void fsl_pci_assign_primary(void) {} #ifdef CONFIG_EDAC_MPC85XX int mpc85xx_pci_err_probe(struct platform_device *op); +int mpc85xx_pci_err_remove(struct platform_device *op); #else static inline int mpc85xx_pci_err_probe(struct platform_device *op) { return -ENOTSUPP; } +static inline int mpc85xx_pci_err_remove(struct platform_device *op) +{ + return -ENOTSUPP; +} + #endif #ifdef CONFIG_FSL_PCI diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index fd46b0b..ea37db9 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -21,6 +21,7 @@ #include #include +#include #include "edac_module.h" #include "edac_core.h" #include "mpc85xx_edac.h" @@ -214,11 +215,13 @@ static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id) int mpc85xx_pci_err_probe(struct platform_device *op) { + struct fsl_pci *fslpci; struct edac_pci_ctl_info *pci; struct mpc85xx_pci_pdata *pdata; - struct resource r; int res = 0; + fslpci = platform_get_drvdata(op); + if (!devres_open_group(&op->dev, mpc85xx_pci_err_probe, GFP_KERNEL)) return -ENOMEM; @@ -239,7 +242,6 @@ int mpc85xx_pci_err_probe(struct platform_device *op) pdata = pci->pvt_info; pdata->name = "mpc85xx_pci_err"; pdata->irq = NO_IRQ; - dev_set_drvdata(&op->dev, pci); pci->dev = &op->dev; pci->mod_name = EDAC_MOD_STR; pci->ctl_name = pdata->name; @@ -250,30 +252,8 @@ int mpc85xx_pci_err_probe(struct platform_device *op) pdata->edac_idx = edac_pci_idx++; - res = of_address_to_resource(op->dev.of_node, 0, &r); - if (res) { - printk(KERN_ERR "%s: Unable to get resource for " - "PCI err regs\n", __func__); - goto err; - } - /* we only need the error registers */ - r.start += 0xe00; - - if (!devm_request_mem_region(&op->dev, r.start, resource_size(&r), - pdata->name)) { - printk(KERN_ERR "%s: Error while requesting mem region\n", - __func__); - res = -EBUSY; - goto err; - } - - pdata->pci_vbase = devm_ioremap(&op->dev, r.start, resource_size(&r)); - if (!pdata->pci_vbase) { - printk(KERN_ERR "%s: Unable to setup PCI err regs\n", __func__); - res = -ENOMEM; - goto err; - } + pdata->pci_vbase = (void *)fslpci->regs + MPC85XX_PCI_ERR_OFFSET; orig_pci_err_cap_dr = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR); @@ -297,7 +277,8 @@ int mpc85xx_pci_err_probe(struct platform_device *op) if (edac_op_state == EDAC_OPSTATE_INT) { pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0); res = devm_request_irq(&op->dev, pdata->irq, - mpc85xx_pci_isr, IRQF_DISABLED, + mpc85xx_pci_isr, + IRQF_DISABLED | IRQF_SHARED, "[EDAC] PCI err", pci); if (res < 0) { printk(KERN_ERR @@ -327,6 +308,34 @@ err: } EXPORT_SYMBOL(mpc85xx_pci_err_probe); +int mpc85xx_pci_err_remove(struct platform_device *op) +{ + struct edac_pci_ctl_info *pci; + struct mpc85xx_pci_pdata *pdata; + + edac_dbg(0, "\n"); + + pci = edac_pci_del_device(&op->dev); + + if (!pci) + return -EINVAL; + + pdata = pci->pvt_info; + + out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR, + orig_pci_err_cap_dr); + + out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, orig_pci_err_en); + + if (edac_op_state == EDAC_OPSTATE_INT) + irq_dispose_mapping(pdata->irq); + + edac_pci_free_ctl_info(pci); + + return 0; +} +EXPORT_SYMBOL(mpc85xx_pci_err_remove); + #endif /* CONFIG_PCI */ /**************************** L2 Err device ***************************/ diff --git a/drivers/edac/mpc85xx_edac.h b/drivers/edac/mpc85xx_edac.h index 932016f..3ba235a 100644 --- a/drivers/edac/mpc85xx_edac.h +++ b/drivers/edac/mpc85xx_edac.h @@ -131,6 +131,7 @@ #define PCI_EDE_PERR_MASK (PCI_EDE_TGT_PERR | PCI_EDE_MST_PERR | \ PCI_EDE_ADDR_PERR) +#define MPC85XX_PCI_ERR_OFFSET 0x0e00 #define MPC85XX_PCI_ERR_DR 0x0000 #define MPC85XX_PCI_ERR_CAP_DR 0x0004 #define MPC85XX_PCI_ERR_EN 0x0008