From patchwork Tue Mar 25 16:56:42 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 3888431 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DF3FF9F2B6 for ; Tue, 25 Mar 2014 16:57:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 18366201FD for ; Tue, 25 Mar 2014 16:57:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 40CA1201F9 for ; Tue, 25 Mar 2014 16:57:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754184AbaCYQ5A (ORCPT ); Tue, 25 Mar 2014 12:57:00 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:51491 "EHLO relmlie1.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753721AbaCYQ4z (ORCPT ); Tue, 25 Mar 2014 12:56:55 -0400 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie1.idc.renesas.com with ESMTP; 26 Mar 2014 01:56:54 +0900 Received: from relmlac1.idc.renesas.com (relmlac1.idc.renesas.com [10.200.69.21]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id 40EFD3B9E8; Wed, 26 Mar 2014 01:56:54 +0900 (JST) Received: by relmlac1.idc.renesas.com (Postfix, from userid 0) id 23F3380193; Wed, 26 Mar 2014 01:56:54 +0900 (JST) Received: from relmlac1.idc.renesas.com (localhost [127.0.0.1]) by relmlac1.idc.renesas.com (Postfix) with ESMTP id 03FA180195; Wed, 26 Mar 2014 01:56:54 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac1.idc.renesas.com with ESMTP id BAB02692; Wed, 26 Mar 2014 01:56:54 +0900 X-IronPort-AV: E=Sophos;i="4.97,728,1389711600"; d="scan'208";a="157266080" Received: from unknown (HELO relay51.aps.necel.com) ([10.29.19.60]) by relmlii2.idc.renesas.com with ESMTP; 26 Mar 2014 01:56:53 +0900 Received: from DU0NOTES13.ad.ree.renesas.com ([172.29.24.131]) by relay51.aps.necel.com (8.14.4+Sun/8.14.4) with ESMTP id s2PGtg3D027433; Wed, 26 Mar 2014 01:56:53 +0900 (JST) Received: from duacsls.ad.ree.renesas.com ([172.29.43.47]) by DU0NOTES13.ad.ree.renesas.com (Lotus Domino Release 8.5.3 HF466) with ESMTP id 2014032517565107-136778 ; Tue, 25 Mar 2014 17:56:51 +0100 From: Phil Edworthy To: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org, LAKML , Bjorn Helgaas , Valentine Barshak , Simon Horman , Magnus Damm , Ben Dooks , Phil Edworthy X-Mailer: git-send-email 1.9.0 In-Reply-To: <1395766604-30926-1-git-send-email-phil.edworthy@renesas.com> References: <1395766604-30926-1-git-send-email-phil.edworthy@renesas.com> X-TNEFEvaluated: 1 Message-ID: <1395766604-30926-8-git-send-email-phil.edworthy@renesas.com> Date: Tue, 25 Mar 2014 16:56:42 +0000 Subject: [PATCH v5 7/9] ARM: shmobile: Add PCIe device tree nodes for R8A7791 Koelsch board X-MIMETrack: Itemize by SMTP Server on DU0NOTES13/SERVER/REE(Release 8.5.3 HF466|March 09, 2012) at 25.03.2014 17:56:51, Serialize by Router on DU0NOTES13/SERVER/REE(Release 8.5.3 HF466|March 09, 2012) at 25.03.2014 17:56:53, Serialize complete at 25.03.2014 17:56:53 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the device tree nodes for the R8A7791 Koelsch board Signed-off-by: Phil Edworthy --- v5: - Renesas SoCs compatible string has peripheral before device name - Add PCIe bus clock reference - Add additional interrupt bindings - Use dma-ranges property to specify inbound memory regions --- arch/arm/boot/dts/r8a7791-koelsch.dts | 14 ++++++++++++++ arch/arm/boot/dts/r8a7791.dtsi | 24 ++++++++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index ee23b7b..3130a0c 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -204,6 +204,16 @@ states = <3300000 1 1800000 0>; }; + + clocks { + /* External PCIe bus clock */ + pcie_bus_clk: pcie_bus_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "pcie_bus"; + }; + }; }; &extal_clk { @@ -382,3 +392,7 @@ spi-cpha; }; }; + +&pcie { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index ccfba57..7a4be4c 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -836,4 +836,28 @@ #size-cells = <0>; status = "disabled"; }; + + pcie: pcie@fe000000 { + compatible = "renesas,pcie-r8a7791"; + reg = <0 0xfe000000 0 0x80000>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + /* Map all possible DDR as inbound ranges */ + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 + 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; + interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH + 0 117 IRQ_TYPE_LEVEL_HIGH + 0 118 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic 0 116 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7791_CLK_PCIE>, <&pcie_bus_clk>; + clock-names = "pcie", "pcie_bus"; + status = "disabled"; + }; };