From patchwork Thu Mar 27 09:26:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 3896971 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id F0064BF540 for ; Thu, 27 Mar 2014 09:27:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3982F2013A for ; Thu, 27 Mar 2014 09:27:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6380C20225 for ; Thu, 27 Mar 2014 09:27:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754687AbaC0J1Y (ORCPT ); Thu, 27 Mar 2014 05:27:24 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:41697 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751398AbaC0J1M (ORCPT ); Thu, 27 Mar 2014 05:27:12 -0400 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie2.idc.renesas.com with ESMTP; 27 Mar 2014 18:27:11 +0900 Received: from relmlac3.idc.renesas.com (relmlac3.idc.renesas.com [10.200.69.23]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id 9FFE74BEDC; Thu, 27 Mar 2014 18:27:11 +0900 (JST) Received: by relmlac3.idc.renesas.com (Postfix, from userid 0) id 96367180A0; Thu, 27 Mar 2014 18:27:11 +0900 (JST) Received: from relmlac3.idc.renesas.com (localhost [127.0.0.1]) by relmlac3.idc.renesas.com (Postfix) with ESMTP id 907A31809F; Thu, 27 Mar 2014 18:27:11 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac3.idc.renesas.com with ESMTP id UAG17246; Thu, 27 Mar 2014 18:27:11 +0900 X-IronPort-AV: E=Sophos;i="4.97,741,1389711600"; d="scan'208";a="157456557" Received: from unknown (HELO relay41.aps.necel.com) ([10.29.19.9]) by relmlii2.idc.renesas.com with ESMTP; 27 Mar 2014 18:27:11 +0900 Received: from DU0NOTES13.ad.ree.renesas.com ([172.29.24.131]) by relay41.aps.necel.com (8.14.4+Sun/8.14.4) with ESMTP id s2R9R33H015745; Thu, 27 Mar 2014 18:27:09 +0900 (JST) Received: from duacsls.ad.ree.renesas.com ([172.29.43.47]) by DU0NOTES13.ad.ree.renesas.com (Lotus Domino Release 8.5.3 HF466) with ESMTP id 2014032710270278-166388 ; Thu, 27 Mar 2014 10:27:02 +0100 From: Phil Edworthy To: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org, LAKML , Bjorn Helgaas , Valentine Barshak , Simon Horman , Magnus Damm , Ben Dooks , Phil Edworthy X-Mailer: git-send-email 1.9.0 In-Reply-To: <1395912416-20087-1-git-send-email-phil.edworthy@renesas.com> References: <1395912416-20087-1-git-send-email-phil.edworthy@renesas.com> X-TNEFEvaluated: 1 Message-ID: <1395912416-20087-8-git-send-email-phil.edworthy@renesas.com> Date: Thu, 27 Mar 2014 09:26:53 +0000 Subject: [PATCH v6 07/10] ARM: shmobile: lager: Add PCIe device nodes X-MIMETrack: Itemize by SMTP Server on DU0NOTES13/SERVER/REE(Release 8.5.3 HF466|March 09, 2012) at 27.03.2014 10:27:03, Serialize by Router on DU0NOTES13/SERVER/REE(Release 8.5.3 HF466|March 09, 2012) at 27.03.2014 10:27:10, Serialize complete at 27.03.2014 10:27:10 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Phil Edworthy v6: - Split device and board DT changes --- arch/arm/boot/dts/r8a7790-lager.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index a55c5f8..bbbcb63 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -139,6 +139,16 @@ states = <3300000 1 1800000 0>; }; + + clocks { + /* External PCIe bus clock - not used */ + pcie_bus_clk: pcie_bus_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + clock-output-names = "pcie_bus"; + }; + }; }; &extal_clk {