From patchwork Tue May 6 13:33:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 4121721 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 964A49F1E1 for ; Tue, 6 May 2014 13:40:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BF32920211 for ; Tue, 6 May 2014 13:40:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D68B6201F9 for ; Tue, 6 May 2014 13:40:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757621AbaEFNf1 (ORCPT ); Tue, 6 May 2014 09:35:27 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:43080 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756680AbaEFNfU (ORCPT ); Tue, 6 May 2014 09:35:20 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s46DYtEF012883; Tue, 6 May 2014 08:34:55 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s46DYt0I022954; Tue, 6 May 2014 08:34:55 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Tue, 6 May 2014 08:34:55 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s46DYE8W031249; Tue, 6 May 2014 08:34:52 -0500 From: Kishon Vijay Abraham I To: , , , , , CC: , , Keerthy , Rajendra Nayak , Tero Kristo , Paul Walmsley , Kishon Vijay Abraham I Subject: [PATCH 07/17] ARM: dts: DRA7: Add divider table to optfclk_pciephy_div clock Date: Tue, 6 May 2014 19:03:53 +0530 Message-ID: <1399383244-14556-8-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1399383244-14556-1-git-send-email-kishon@ti.com> References: <1399383244-14556-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Keerthy Add divider table to optfclk_pciephy_div clock. The Documentation for divider clock can be found at ../clock/ti/divider.txt Cc: Rajendra Nayak Cc: Tero Kristo Cc: Paul Walmsley Signed-off-by: Keerthy Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index c767687..55e95c5 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -1170,6 +1170,7 @@ clocks = <&apll_pcie_ck>; #clock-cells = <0>; reg = <0x021c>; + ti,dividers = <2>, <1>; ti,bit-shift = <8>; ti,max-div = <2>; };