From patchwork Fri Dec 12 02:36:54 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ray Jui X-Patchwork-Id: 5478811 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C6EDB9F1D4 for ; Fri, 12 Dec 2014 02:39:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EA829201EF for ; Fri, 12 Dec 2014 02:39:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6A9BE201ED for ; Fri, 12 Dec 2014 02:39:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759570AbaLLCem (ORCPT ); Thu, 11 Dec 2014 21:34:42 -0500 Received: from mail-gw2-out.broadcom.com ([216.31.210.63]:40655 "EHLO mail-gw2-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750764AbaLLCek (ORCPT ); Thu, 11 Dec 2014 21:34:40 -0500 X-IronPort-AV: E=Sophos;i="5.07,561,1413270000"; d="scan'208";a="52876397" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw2-out.broadcom.com with ESMTP; 11 Dec 2014 19:05:07 -0800 Received: from IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.174.1; Thu, 11 Dec 2014 18:34:30 -0800 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) with Microsoft SMTP Server id 14.3.174.1; Thu, 11 Dec 2014 18:34:39 -0800 Received: from mail.broadcom.com (lbrmn-lnxub44.ric.broadcom.com [10.136.8.49]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id A0C3640FE5; Thu, 11 Dec 2014 18:34:00 -0800 (PST) From: Ray Jui To: Bjorn Helgaas , Rob Herring , Pawel Moll , Mark Rutland , "Ian Campbell" , Kumar Gala , Grant Likely , Christian Daudt , Matt Porter , Florian Fainelli , Russell King , Hauke Mehrtens CC: Lucas Stach , Scott Branden , , , , , , "Ray Jui" Subject: [PATCH v2 1/4] pci: iProc: define Broadcom iProc PCIe binding Date: Thu, 11 Dec 2014 18:36:54 -0800 Message-ID: <1418351817-14898-2-git-send-email-rjui@broadcom.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1418351817-14898-1-git-send-email-rjui@broadcom.com> References: <1418351817-14898-1-git-send-email-rjui@broadcom.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document the PCIe device tree binding for Broadcom iProc family of SoCs Signed-off-by: Ray Jui Reviewed-by: Scott Branden --- .../devicetree/bindings/pci/brcm,iproc-pcie.txt | 74 ++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt new file mode 100644 index 0000000..040bc0f --- /dev/null +++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt @@ -0,0 +1,74 @@ +* Broadcom iProc PCIe controller + +Required properties: +- compatible: Must be "brcm,iproc-pcie" +- reg: base address and length of the PCIe controller and the MDIO interface + that controls the PCIe PHY +- #interrupt-cells: set to <1> +- interrupts: interrupt IDs +- interrupt-map-mask and interrupt-map, standard PCI properties to define the + mapping of the PCIe interface to interrupt numbers +- bus-range: PCI bus numbers covered +- #address-cells: set to <3> +- #size-cells: set to <2> +- device_type: set to "pci" +- ranges: ranges for the PCI memory and I/O regions +- phy-addr: MDC/MDIO adddress of the PCIe PHY +- have-msi-inten-reg: Required for legacy iProc PCIe controllers that need the + MSI interrupt enable register to be set explicitly + +The Broadcom iProc PCie driver adapts the multi-domain structure, i.e., each +interface has its own domain and therefore has its own device node +Example: + +SoC specific DT Entry: + + pcie0: pcie@18012000 { + compatible = "brcm,iproc-pcie"; + reg = <0x18012000 0x1000>, + <0x18002000 0x1000>; + + #interrupt-cells = <1>; + interrupts = , + , + , + , + , + ; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>; + + bus-range = <0x00 0xFF>; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x81000000 0 0 0x28000000 0 0x00010000 /* downstream I/O */ + 0x82000000 0 0x20000000 0x20000000 0 0x04000000>; /* non-prefetchable memory */ + phy-addr = <5>; + }; + + pcie1: pcie@18013000 { + compatible = "brcm,iproc-pcie"; + reg = <0x18013000 0x1000>, + <0x18002000 0x1000>; + + #interrupt-cells = <1>; + interrupts = , + , + , + , + , + ; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>; + + bus-range = <0x00 0xFF>; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x81000000 0 0 0x48000000 0 0x00010000 /* downstream I/O */ + 0x82000000 0 0x40000000 0x40000000 0 0x04000000>; /* non-prefetchable memory */ + phy-addr = <6>; + };