From patchwork Mon Dec 22 05:54:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Yang X-Patchwork-Id: 5525901 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 606C2BEEBA for ; Mon, 22 Dec 2014 05:54:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8D3382015A for ; Mon, 22 Dec 2014 05:54:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9E2632017D for ; Mon, 22 Dec 2014 05:54:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752706AbaLVFyz (ORCPT ); Mon, 22 Dec 2014 00:54:55 -0500 Received: from e23smtp08.au.ibm.com ([202.81.31.141]:46159 "EHLO e23smtp08.au.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751583AbaLVFyz (ORCPT ); Mon, 22 Dec 2014 00:54:55 -0500 Received: from /spool/local by e23smtp08.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 22 Dec 2014 15:54:51 +1000 Received: from d23relay06.au.ibm.com (d23relay06.au.ibm.com [9.185.63.219]) by d23dlp03.au.ibm.com (Postfix) with ESMTP id BA4E03578057 for ; Mon, 22 Dec 2014 16:54:50 +1100 (EST) Received: from d23av01.au.ibm.com (d23av01.au.ibm.com [9.190.234.96]) by d23relay06.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id sBM5sojT39321602 for ; Mon, 22 Dec 2014 16:54:50 +1100 Received: from d23av01.au.ibm.com (localhost [127.0.0.1]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id sBM5snjv020428 for ; Mon, 22 Dec 2014 16:54:50 +1100 Received: from localhost ([9.123.251.199]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id sBM5smPL020378; Mon, 22 Dec 2014 16:54:49 +1100 From: Wei Yang To: bhelgaas@google.com, benh@au1.ibm.com, gwshan@linux.vnet.ibm.com Cc: linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Wei Yang Subject: [PATCH V10 03/17] PCI: Add weak pcibios_iov_resource_alignment() interface Date: Mon, 22 Dec 2014 13:54:23 +0800 Message-Id: <1419227677-12312-4-git-send-email-weiyang@linux.vnet.ibm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1419227677-12312-1-git-send-email-weiyang@linux.vnet.ibm.com> References: <1419227677-12312-1-git-send-email-weiyang@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 14122205-0029-0000-0000-000000DEA69F Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The alignment of PF's IOV BAR is designed to be the individual size of a VF's BAR size. This works fine for many platforms, but on PowerNV platform it needs some change. The original alignment works, since at sizing and assigning stage the requirement is from an individual VF's BAR size instead of the PF's IOV BAR. This is the reason for the original code to just retrieve the individual VF BAR size as the alignment. On PowerNV platform, it is required to align the whole PF IOV BAR to a hardware segment. Based on this fact, the alignment of PF's IOV BAR should be calculated seperately. This patch introduces a weak pcibios_iov_resource_alignment() interface, which gives platform a chance to implement specific method to calculate the PF's IOV BAR alignment. Signed-off-by: Wei Yang --- drivers/pci/iov.c | 11 ++++++++++- include/linux/pci.h | 3 +++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c index 5437fad0..554dd64 100644 --- a/drivers/pci/iov.c +++ b/drivers/pci/iov.c @@ -556,6 +556,12 @@ int pci_iov_resource_bar(struct pci_dev *dev, int resno) 4 * (resno - PCI_IOV_RESOURCES); } +resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev, + int resno, resource_size_t align) +{ + return align; +} + /** * pci_sriov_resource_alignment - get resource alignment for VF BAR * @dev: the PCI device @@ -570,12 +576,15 @@ resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) { struct resource tmp; int reg = pci_iov_resource_bar(dev, resno); + resource_size_t align; if (!reg) return 0; __pci_read_base(dev, pci_bar_unknown, &tmp, reg); - return resource_alignment(&tmp); + align = resource_alignment(&tmp); + + return pcibios_iov_resource_alignment(dev, resno, align); } /** diff --git a/include/linux/pci.h b/include/linux/pci.h index 74ef944..ae7a7ea 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1163,6 +1163,9 @@ unsigned char pci_bus_max_busnr(struct pci_bus *bus); void pci_setup_bridge(struct pci_bus *bus); resource_size_t pcibios_window_alignment(struct pci_bus *bus, unsigned long type); +resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, + int resno, + resource_size_t align); #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0) #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)