From patchwork Mon Jan 26 09:19:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= X-Patchwork-Id: 5707211 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 907539F2ED for ; Mon, 26 Jan 2015 09:19:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BDA7420131 for ; Mon, 26 Jan 2015 09:19:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E0EE22012B for ; Mon, 26 Jan 2015 09:19:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752845AbbAZJTi (ORCPT ); Mon, 26 Jan 2015 04:19:38 -0500 Received: from mail-wi0-f172.google.com ([209.85.212.172]:36291 "EHLO mail-wi0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752718AbbAZJTg (ORCPT ); Mon, 26 Jan 2015 04:19:36 -0500 Received: by mail-wi0-f172.google.com with SMTP id h11so8436250wiw.5 for ; Mon, 26 Jan 2015 01:19:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:mime-version:content-type :content-transfer-encoding; bh=tiUlvEjgvo1t0ZSM2a9pnjepb0k0s6s7qhxilwn5630=; b=Wvx6JPo64rmUFPu20sLXvKthKEh4cZY5zoGFo4DStRq/roM6L7beJ/SMkYvtKgC49R VKreeXQTT/fMI/bTM81mMg6ZeUsUzxU23AxKbncWWPREFYlhXtzea218GkGrPQj+qMo+ snx0z2LW2cav9M+kHNsfAil8MSRTLcFyO90tAifXwiTQev5Grbw1kC9Pi9e7hBe14Tg4 6z1wa+I9mmu0jvxfpkfNRe7YFpMUsUMvzn6UOvzUDsUy/7nycwalMcpxDpzrDAnOuf8F QfOGeA2htpTOZ6I9+wk7pmjpsd5Me9U7S+TF89ejAlFZOnY2BAJpymmQZO04ax2NMz+/ /1Vg== X-Received: by 10.194.110.69 with SMTP id hy5mr42682145wjb.121.1422263975562; Mon, 26 Jan 2015 01:19:35 -0800 (PST) Received: from linux-tdhb.lan (static-91-227-21-4.devs.futuro.pl. [91.227.21.4]) by mx.google.com with ESMTPSA id vq9sm9636544wjc.6.2015.01.26.01.19.34 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 26 Jan 2015 01:19:34 -0800 (PST) From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= To: Bjorn Helgaas , linux-pci@vger.kernel.org Cc: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Subject: [PATCH] PCI: Add defines for max read requests sizes Date: Mon, 26 Jan 2015 10:19:17 +0100 Message-Id: <1422263957-3148-1-git-send-email-zajec5@gmail.com> X-Mailer: git-send-email 1.8.4.5 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There are few drivers using magic numbers when operating with PCIe capabilities and PCI_EXP_DEVCTL_READRQ. Define known values to allow cleaning their code a bit. Signed-off-by: Rafa? Mi?ecki --- Hi, I'm new to the PCI subsystem, so let me know if there is anything wrong with my patch. I hope you find these bits worth defining and that my coding style matches rest of the file. --- include/uapi/linux/pci_regs.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 4a1d0cc..efe3443 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -451,6 +451,10 @@ #define PCI_EXP_DEVCTL_AUX_PME 0x0400 /* Auxiliary Power PM Enable */ #define PCI_EXP_DEVCTL_NOSNOOP_EN 0x0800 /* Enable No Snoop */ #define PCI_EXP_DEVCTL_READRQ 0x7000 /* Max_Read_Request_Size */ +#define PCI_EXP_DEVCTL_READRQ_128B 0x0000 /* 128 Bytes */ +#define PCI_EXP_DEVCTL_READRQ_256B 0x1000 /* 256 Bytes */ +#define PCI_EXP_DEVCTL_READRQ_512B 0x2000 /* 512 Bytes */ +#define PCI_EXP_DEVCTL_READRQ_1024B 0x3000 /* 1024 Bytes */ #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ #define PCI_EXP_DEVSTA 10 /* Device Status */ #define PCI_EXP_DEVSTA_CED 0x0001 /* Correctable Error Detected */