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[3/5] tile: use PCI define for max read request size

Message ID 1422291972-12412-1-git-send-email-zajec5@gmail.com (mailing list archive)
State New, archived
Delegated to: Bjorn Helgaas
Headers show

Commit Message

Rafał Miłecki Jan. 26, 2015, 5:06 p.m. UTC 
Signed-off-by: Rafa? Mi?ecki <zajec5@gmail.com>
---
 arch/tile/kernel/pci.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Chris Metcalf Jan. 26, 2015, 6:21 p.m. UTC | #1 
On 1/26/2015 12:06 PM, Rafa? Mi?ecki wrote:
> Signed-off-by: Rafa? Mi?ecki <zajec5@gmail.com>
> ---
>   arch/tile/kernel/pci.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)

Acked-by: Chris Metcalf <cmetcalf@ezchip.com>
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Patch

diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index f70c789..325df47 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -245,7 +245,7 @@  static void fixup_read_and_payload_sizes(void)
 {
 	struct pci_dev *dev = NULL;
 	int smallest_max_payload = 0x1; /* Tile maxes out at 256 bytes. */
-	int max_read_size = 0x2; /* Limit to 512 byte reads. */
+	int max_read_size = PCI_EXP_DEVCTL_READRQ_512B;
 	u16 new_values;
 
 	/* Scan for the smallest maximum payload size. */
@@ -258,7 +258,7 @@  static void fixup_read_and_payload_sizes(void)
 	}
 
 	/* Now, set the max_payload_size for all devices to that value. */
-	new_values = (max_read_size << 12) | (smallest_max_payload << 5);
+	new_values = max_read_size | (smallest_max_payload << 5);
 	for_each_pci_dev(dev)
 		pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
 				PCI_EXP_DEVCTL_PAYLOAD | PCI_EXP_DEVCTL_READRQ,