From patchwork Wed Jan 28 16:16:16 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rob Herring (Arm)" X-Patchwork-Id: 5736331 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EDE869F3CB for ; Thu, 29 Jan 2015 03:09:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 23C762011E for ; Thu, 29 Jan 2015 03:09:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 560BF201FE for ; Thu, 29 Jan 2015 03:09:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757097AbbA2DJc (ORCPT ); Wed, 28 Jan 2015 22:09:32 -0500 Received: from mail-oi0-f53.google.com ([209.85.218.53]:60775 "EHLO mail-oi0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754076AbbA2DJ3 (ORCPT ); Wed, 28 Jan 2015 22:09:29 -0500 Received: by mail-oi0-f53.google.com with SMTP id i138so22666299oig.12 for ; Wed, 28 Jan 2015 19:09:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=9Vo5zA2tpRRJ9Z4fzZVSMII+bDRP0NjGzhIO03PZA94=; b=eC1byROF73O0VN3l+JKGR2XwExjn16SWXcVcuacmr/Fd9VvpNJOd+QlVKcEX04+fn4 inGb+/Di2gshKQvVVE0/IlBbVdhRMtyzwrMZrL/KM/ko4GZcopRXNwikMMUZnTVCQn63 vlz2pc0AC2IlfDfJfeDj+e/KKJHWWzfrZSs0tYSjqt0KeuyQvwe4Gg1xH8VTTo0mtPXC Qa4CXSoAAKVx0aOZzOAWyV5mBF6r/AgY4/GXZrzc2VhTn6lB8w0UUkalFNqLfnr3gugO FzC8pPhr9P4UvctJW7DdK94eL5kmIOoxphbGZ0G/Q72R8NuBhidOKLCnHDLvU73eGcHN tz+w== X-Received: by 10.60.156.196 with SMTP id wg4mr2635291oeb.11.1422461788888; Wed, 28 Jan 2015 08:16:28 -0800 (PST) Received: from rob-laptop.herring.priv (72-48-98-129.dyn.grandenetworks.net. [72.48.98.129]) by mx.google.com with ESMTPSA id mp3sm2445861obb.25.2015.01.28.08.16.27 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 28 Jan 2015 08:16:27 -0800 (PST) From: Rob Herring To: Bjorn Helgaas Cc: linux-pci@vger.kernel.org, Russell King , Linus Walleij , Arnd Bergmann , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Subject: [PATCH v2 1/3] dt/bindings: add versatile PCI binding Date: Wed, 28 Jan 2015 10:16:16 -0600 Message-Id: <1422461778-6769-2-git-send-email-robh@kernel.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1422461778-6769-1-git-send-email-robh@kernel.org> References: <1422461778-6769-1-git-send-email-robh@kernel.org> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add binding documentation for the PCI controller found on Versatile PB boards. Signed-off-by: Rob Herring Cc: Linus Walleij Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala --- .../devicetree/bindings/pci/versatile.txt | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/versatile.txt diff --git a/Documentation/devicetree/bindings/pci/versatile.txt b/Documentation/devicetree/bindings/pci/versatile.txt new file mode 100644 index 0000000..2cc6071 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/versatile.txt @@ -0,0 +1,59 @@ +* ARM Versatile Platform Baseboard PCI interface + +PCI host controller found on the ARM Versatile PB board's FPGA. + +Required properties: +- compatible: should contain "arm,versatile-pci" to identify the Versatile PCI + controller. +- reg: base addresses and lengths of the pci controller. There must be 3 + entries: + - Versatile specific registers + - Self Config space + - Config space +- #address-cells: set to <3> +- #size-cells: set to <2> +- device_type: set to "pci" +- bus-range: set to <0 0xff> +- ranges: ranges for the PCI memory and I/O regions +- #interrupt-cells: set to <1> +- interrupt-map-mask and interrupt-map: standard PCI properties to define + the mapping of the PCI interface to interrupt numbers. + +Example: + +pci-controller@10001000 { + compatible = "arm,versatile-pci"; + device_type = "pci"; + reg = <0x10001000 0x1000 + 0x41000000 0x10000 + 0x42000000 0x100000>; + bus-range = <0 0xff>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */ + 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */ + 0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */ + + interrupt-map-mask = <0x1800 0 0 7>; + interrupt-map = <0x1800 0 0 1 &sic 28 + 0x1800 0 0 2 &sic 29 + 0x1800 0 0 3 &sic 30 + 0x1800 0 0 4 &sic 27 + + 0x1000 0 0 1 &sic 27 + 0x1000 0 0 2 &sic 28 + 0x1000 0 0 3 &sic 29 + 0x1000 0 0 4 &sic 30 + + 0x0800 0 0 1 &sic 30 + 0x0800 0 0 2 &sic 27 + 0x0800 0 0 3 &sic 28 + 0x0800 0 0 4 &sic 29 + + 0x0000 0 0 1 &sic 29 + 0x0000 0 0 2 &sic 30 + 0x0000 0 0 3 &sic 27 + 0x0000 0 0 4 &sic 28>; +};