From patchwork Fri Feb 6 20:15:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Murali Karicheri X-Patchwork-Id: 5794741 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 76BB39F302 for ; Fri, 6 Feb 2015 20:17:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7B4DD2017D for ; Fri, 6 Feb 2015 20:17:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D44EB20173 for ; Fri, 6 Feb 2015 20:16:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755025AbbBFUQY (ORCPT ); Fri, 6 Feb 2015 15:16:24 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:55278 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932069AbbBFUQW (ORCPT ); Fri, 6 Feb 2015 15:16:22 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id t16KFOLH019098; Fri, 6 Feb 2015 14:15:24 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t16KFN1J029795; Fri, 6 Feb 2015 14:15:23 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Fri, 6 Feb 2015 14:15:22 -0600 Received: from ula0868495.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t16KFLIX001111; Fri, 6 Feb 2015 14:15:21 -0600 From: Murali Karicheri To: , , , CC: Murali Karicheri , Joerg Roedel , Grant Likely , Rob Herring , Bjorn Helgaas , Will Deacon , Russell King , Arnd Bergmann , Suravee Suthikulpanit Subject: [PATCH] of: calculate masks of the device based on dma-range size Date: Fri, 6 Feb 2015 15:15:20 -0500 Message-ID: <1423253720-2785-1-git-send-email-m-karicheri2@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch update of_dma_configure() API to calculate the masks (dma_mask and coherent_dma_mask) based on the dma-range values set in DT for the device. Also limit the mask to lower of the default mask and mask calculated. Cc: Joerg Roedel Cc: Grant Likely Cc: Rob Herring Cc: Bjorn Helgaas Cc: Will Deacon Cc: Russell King Cc: Arnd Bergmann Cc: Suravee Suthikulpanit Signed-off-by: Murali Karicheri --- drivers/of/device.c | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/of/device.c b/drivers/of/device.c index 314c8a9..44209fa 100644 --- a/drivers/of/device.c +++ b/drivers/of/device.c @@ -83,17 +83,18 @@ int of_device_add(struct platform_device *ofdev) */ void of_dma_configure(struct device *dev, struct device_node *np) { - u64 dma_addr, paddr, size; + u64 dma_addr = 0, paddr, size; int ret; bool coherent; - unsigned long offset; + unsigned long offset = 0; struct iommu_ops *iommu; /* * Set default dma-mask to 32 bit. Drivers are expected to setup * the correct supported dma_mask. */ - dev->coherent_dma_mask = DMA_BIT_MASK(32); + if (!dev->coherent_dma_mask) + dev->coherent_dma_mask = DMA_BIT_MASK(32); /* * Set it to coherent_dma_mask by default if the architecture @@ -102,11 +103,14 @@ void of_dma_configure(struct device *dev, struct device_node *np) if (!dev->dma_mask) dev->dma_mask = &dev->coherent_dma_mask; + /* + * Set default size to cover the 32-bit. Drivers are expected to setup + * the correct size and dma_mask. + */ + size = 1ULL << 32; + ret = of_dma_get_range(np, &dma_addr, &paddr, &size); - if (ret < 0) { - dma_addr = offset = 0; - size = dev->coherent_dma_mask + 1; - } else { + if (!ret) { offset = PFN_DOWN(paddr - dma_addr); /* @@ -128,6 +132,15 @@ void of_dma_configure(struct device *dev, struct device_node *np) dev->dma_pfn_offset = offset; + /* + * Limit coherent and dma mask based on size and default mask + * set by the driver. + */ + dev->coherent_dma_mask = min(dev->coherent_dma_mask, + DMA_BIT_MASK(ilog2(dma_addr + size))); + *dev->dma_mask = min((*dev->dma_mask), + DMA_BIT_MASK(ilog2(dma_addr + size))); + coherent = of_dma_is_coherent(np); dev_dbg(dev, "device is%sdma coherent\n", coherent ? " " : " not ");