From patchwork Fri Apr 24 06:59:51 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 6266611 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DE3C79F313 for ; Fri, 24 Apr 2015 07:03:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 06FEA201B9 for ; Fri, 24 Apr 2015 07:03:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C87A12015E for ; Fri, 24 Apr 2015 07:03:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933537AbbDXHD4 (ORCPT ); Fri, 24 Apr 2015 03:03:56 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:8132 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933491AbbDXHDz (ORCPT ); Fri, 24 Apr 2015 03:03:55 -0400 Received: from 172.24.2.119 (EHLO szxeml426-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CKI51189; Fri, 24 Apr 2015 15:03:37 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml426-hub.china.huawei.com (10.82.67.181) with Microsoft SMTP Server id 14.3.158.1; Fri, 24 Apr 2015 15:02:52 +0800 From: Yijing Wang To: CC: , , , , Yijing Wang Subject: [PATCH v2] PCI: Fix NULL pointer when find parent pcie_link_state Date: Fri, 24 Apr 2015 14:59:51 +0800 Message-ID: <1429858791-26331-1-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP https://bugzilla.kernel.org/show_bug.cgi?id=94361 reported in ATCA platform, system had unusual pcie topology: (root port) (downstream port) (upstream port) +-1c.0-[02-0a]----00.0-[03-0a]--+-00.0-[04]-- | +-01.0-[05]-- (downstream port) | +-02.0-[06]-- | +-03.0-[07]-- | +-08.0-[08]-- | +-09.0-[09]-- | \-0a.0-[0a]-- We assumed root port and downstream port always have external link, and downstream port always has a upstream port. So in this case, when we allocated pcie_link_state for downstream port 02:00.0, it try to get parent bus pcie_link_state, parent = pdev->bus->parent->self->link_state; because root bus self is NULL, system will crash here. This patch fix this issue based on the following assumption suggested by Bjorn. 1. Root port is always on the upstream end of a link. 2. The pcie hierarchy should alternate between links and internal switch logic, there should be no adjacent links or internal buses in pcie tree. Suggested-by: Bjorn Helgaas Signed-off-by: Yijing Wang --- drivers/pci/pcie/aspm.c | 23 +++++++++++++++++++++-- 1 files changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 7d4fcdc..61b9d3f 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -546,6 +546,25 @@ static struct pcie_link_state *alloc_pcie_link_state(struct pci_dev *pdev) return link; } +/* + * We assume root port is always on the upstream end of + * a link, and the pcie hierarchy should alternate + * between links and internal switch logic. + */ +static bool pcie_has_external_link(struct pci_dev *pdev) +{ + if (!pci_is_pcie(pdev)) + return false; + + if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT) + return true; + + if (pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM) + if (!pdev->bus->self->link_state) + return true; + + return false; +} /* * pcie_aspm_init_link_state: Initiate PCI express link state. * It is called after the pcie and its children devices are scanned. @@ -561,8 +580,8 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev) if (!pci_is_pcie(pdev) || pdev->link_state) return; - if (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT && - pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM) + + if (!pcie_has_external_link(pdev)) return; /* VIA has a strange chipset, root port is under a bridge */