From patchwork Thu Jun 4 06:41:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 6544071 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 79514C0020 for ; Thu, 4 Jun 2015 06:43:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 908BB20755 for ; Thu, 4 Jun 2015 06:43:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8C57720762 for ; Thu, 4 Jun 2015 06:43:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752372AbbFDGnw (ORCPT ); Thu, 4 Jun 2015 02:43:52 -0400 Received: from e23smtp03.au.ibm.com ([202.81.31.145]:54965 "EHLO e23smtp03.au.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752520AbbFDGnl (ORCPT ); Thu, 4 Jun 2015 02:43:41 -0400 Received: from /spool/local by e23smtp03.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 4 Jun 2015 16:43:36 +1000 Received: from d23relay08.au.ibm.com (d23relay08.au.ibm.com [9.185.71.33]) by d23dlp02.au.ibm.com (Postfix) with ESMTP id 7E42E2BB0070; Thu, 4 Jun 2015 16:43:35 +1000 (EST) Received: from d23av02.au.ibm.com (d23av02.au.ibm.com [9.190.235.138]) by d23relay08.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t546hQhS393604; Thu, 4 Jun 2015 16:43:34 +1000 Received: from d23av02.au.ibm.com (localhost [127.0.0.1]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t546h1gG005358; Thu, 4 Jun 2015 16:43:03 +1000 Received: from ozlabs.au.ibm.com (ozlabs.au.ibm.com [9.192.253.14]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t546h1oN004584; Thu, 4 Jun 2015 16:43:01 +1000 Received: from bran.ozlabs.ibm.com (unknown [9.192.254.114]) by ozlabs.au.ibm.com (Postfix) with ESMTP id F012BA03EA; Thu, 4 Jun 2015 16:42:28 +1000 (AEST) Received: from gwshan (shangw.ozlabs.ibm.com [10.61.2.199]) by bran.ozlabs.ibm.com (Postfix) with ESMTP id 07738E387C; Thu, 4 Jun 2015 16:42:29 +1000 (AEST) Received: by gwshan (Postfix, from userid 1000) id E8E179422B2; Thu, 4 Jun 2015 16:42:28 +1000 (AEST) From: Gavin Shan To: linuxppc-dev@lists.ozlabs.org Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, benh@kernel.crashing.org, bhelgaas@google.com, aik@ozlabs.ru, panto@antoniou-consulting.com, robherring2@gmail.com, grant.likely@linaro.org, Gavin Shan Subject: [PATCH v5 15/42] powerpc/powernv: Reserve PE# for root bus Date: Thu, 4 Jun 2015 16:41:44 +1000 Message-Id: <1433400131-18429-16-git-send-email-gwshan@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1433400131-18429-1-git-send-email-gwshan@linux.vnet.ibm.com> References: <1433400131-18429-1-git-send-email-gwshan@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15060406-0009-0000-0000-00000183D94B Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP pcibios_setup_bridge(), called to update PCI bridge windows, will allocate PE for PCI buses. The function isn't called for root bus that doesn't have upstream bridge. The patch reserves PE# for root bus in advance so that we can setup it in next patch. Signed-off-by: Gavin Shan --- v5: * Split from [PATCH v5 v4 06/21] * Replace "strip of" with "strip off" in comments --- arch/powerpc/platforms/powernv/pci-ioda.c | 31 ++++++++++++++++++++++++++++++- arch/powerpc/platforms/powernv/pci.h | 1 + 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index 0d6539a..2eb8baa 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c @@ -230,6 +230,13 @@ static int pnv_ioda1_init_m64(struct pnv_phb *phb) pr_warn(" Cannot strip M64 segment for reserved PE#%d\n", phb->ioda.reserved_pe); + /* Strip off the segment used by PE for PCI root bus, + * which is last supported PE#, or one next to the + * reserved PE# + */ + if (phb->ioda.root_pe != IODA_INVALID_PE) + r->end -= phb->ioda.m64_segsize; + return 0; fail: @@ -287,6 +294,13 @@ static int pnv_ioda2_init_m64(struct pnv_phb *phb) pr_warn(" Cannot strip M64 segment for reserved PE#%d\n", phb->ioda.reserved_pe); + /* Strip off the segment used by PE for PCI root bus, + * which is last supported PE#, or one next to the + * reserved PE# + */ + if (phb->ioda.root_pe != IODA_INVALID_PE) + r->end -= phb->ioda.m64_segsize; + return 0; fail: @@ -3331,7 +3345,22 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np, aux = memblock_virt_alloc(size, 0); phb->ioda.pe_alloc = aux; phb->ioda.pe_array = aux + pemap_off; - set_bit(phb->ioda.reserved_pe, phb->ioda.pe_alloc); + + /* Choose number of PE for root bus, which shouldn't consume + * any M64 resource. So we avoid picking low-end PE#, which + * is usually binding with 64-bits prefetchable memory resources + * closely. + */ + pnv_ioda_reserve_pe(phb, phb->ioda.reserved_pe); + if (phb->ioda.reserved_pe == 0) { + phb->ioda.root_pe = phb->ioda.total_pe - 1; + pnv_ioda_reserve_pe(phb, phb->ioda.root_pe); + } else if (phb->ioda.reserved_pe == (phb->ioda.total_pe - 1)) { + phb->ioda.root_pe = phb->ioda.reserved_pe - 1; + pnv_ioda_reserve_pe(phb, phb->ioda.root_pe); + } else { + phb->ioda.root_pe = IODA_INVALID_PE; + } INIT_LIST_HEAD(&phb->ioda.pe_dma_list); INIT_LIST_HEAD(&phb->ioda.pe_list); diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h index 590f778..e372b9f 100644 --- a/arch/powerpc/platforms/powernv/pci.h +++ b/arch/powerpc/platforms/powernv/pci.h @@ -133,6 +133,7 @@ struct pnv_phb { struct { /* Global bridge info */ unsigned int total_pe; + unsigned int root_pe; unsigned int reserved_pe; /* 32-bit MMIO window */