From patchwork Fri Jul 24 11:53:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 6860161 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9E8D59F434 for ; Fri, 24 Jul 2015 11:54:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C9160205EF for ; Fri, 24 Jul 2015 11:54:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E060F205F5 for ; Fri, 24 Jul 2015 11:54:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754267AbbGXLxZ (ORCPT ); Fri, 24 Jul 2015 07:53:25 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:57333 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754249AbbGXLxV (ORCPT ); Fri, 24 Jul 2015 07:53:21 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id t6OBrJlT016868; Fri, 24 Jul 2015 06:53:19 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t6OBrJK7025248; Fri, 24 Jul 2015 06:53:19 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Fri, 24 Jul 2015 06:53:19 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t6OBrCHZ007404; Fri, 24 Jul 2015 06:53:17 -0500 From: Kishon Vijay Abraham I To: , , , CC: , Subject: [PATCH v2 2/3] PCI: host: pci-dra7xx: add pm support to pci dra7xx Date: Fri, 24 Jul 2015 17:23:09 +0530 Message-ID: <1437738790-11114-3-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1437738790-11114-1-git-send-email-kishon@ti.com> References: <1437738790-11114-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add PM support to pci-dra7xx so that PCI clocks can be disabled during suspend and enabled back during resume without affecting PCI functionality. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/host/pci-dra7xx.c | 77 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/drivers/pci/host/pci-dra7xx.c b/drivers/pci/host/pci-dra7xx.c index d8b6d66..d3ee2ef 100644 --- a/drivers/pci/host/pci-dra7xx.c +++ b/drivers/pci/host/pci-dra7xx.c @@ -433,6 +433,82 @@ static int __exit dra7xx_pcie_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_PM_SLEEP +static int dra7xx_pcie_suspend(struct device *dev) +{ + struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev); + struct pcie_port *pp = &dra7xx->pp; + + dw_pcie_suspend_rc(pp); + + return 0; +} + +static int dra7xx_pcie_resume(struct device *dev) +{ + struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev); + struct pcie_port *pp = &dra7xx->pp; + + dw_pcie_resume_rc(pp); + + return 0; +} + +static int dra7xx_pcie_suspend_noirq(struct device *dev) +{ + struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev); + int count = dra7xx->phy_count; + + while (count--) { + phy_power_off(dra7xx->phy[count]); + phy_exit(dra7xx->phy[count]); + } + + return 0; +} + +static int dra7xx_pcie_resume_noirq(struct device *dev) +{ + struct dra7xx_pcie *dra7xx = dev_get_drvdata(dev); + int phy_count = dra7xx->phy_count; + int ret; + int i; + + for (i = 0; i < phy_count; i++) { + ret = phy_init(dra7xx->phy[i]); + if (ret < 0) + goto err_phy; + + ret = phy_power_on(dra7xx->phy[i]); + if (ret < 0) { + phy_exit(dra7xx->phy[i]); + goto err_phy; + } + } + + return 0; + +err_phy: + while (--i >= 0) { + phy_power_off(dra7xx->phy[i]); + phy_exit(dra7xx->phy[i]); + } + + return ret; +} + +static const struct dev_pm_ops dra7xx_pcie_pm_ops = { + .suspend_noirq = dra7xx_pcie_suspend_noirq, + .suspend = dra7xx_pcie_suspend, + .resume_noirq = dra7xx_pcie_resume_noirq, + .resume = dra7xx_pcie_resume, +}; + +#define DEV_PM_OPS (&dra7xx_pcie_pm_ops) +#else +#define DEV_PM_OPS NULL +#endif + static const struct of_device_id of_dra7xx_pcie_match[] = { { .compatible = "ti,dra7-pcie", }, {}, @@ -444,6 +520,7 @@ static struct platform_driver dra7xx_pcie_driver = { .driver = { .name = "dra7-pcie", .of_match_table = of_dra7xx_pcie_match, + .pm = DEV_PM_OPS, }, };