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Tue, 28 Jul 2015 10:46:08 +0000 Received: from sj-mail01.altera.com (137.57.1.6) by webmail.altera.com (66.35.236.227) with Microsoft SMTP Server (TLS) id 14.3.174.1; Tue, 28 Jul 2015 03:44:49 -0700 Received: from leyfoon-vm (pg-lftan-l.altera.com [137.57.103.123]) by sj-mail01.altera.com (8.13.7+Sun/8.13.7) with SMTP id t6SAk1jQ011063; Tue, 28 Jul 2015 03:46:02 -0700 (PDT) Received: by leyfoon-vm (sSMTP sendmail emulation); Tue, 28 Jul 2015 18:46:09 +0800 From: Ley Foon Tan To: Bjorn Helgaas , Russell King , Arnd Bergmann , Dinh Nguyen CC: , , , , , Ley Foon Tan , , Rob Herring Subject: [PATCH 4/6] pci: altera: Add Altera PCIe MSI driver Date: Tue, 28 Jul 2015 18:45:43 +0800 Message-ID: <1438080345-7233-5-git-send-email-lftan@altera.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1438080345-7233-1-git-send-email-lftan@altera.com> References: <1438080345-7233-1-git-send-email-lftan@altera.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1; BN1AFFO11FD015; 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3:kPiQJN7hVNvTlLoN7SDRJDYlUFqYOzEGopf8UGjrUZJzaJhS83gxqCuLIk5qGIwYpLyPkIFhs5s64HSb0ctK44J5j+tHea6jT64fbps0JR2M4hogtfZi1NkqQbzVC4QjbPmDEeDUN1LCym+H6ZPEXb3sG8/imvvr35Qe1evEXOoeHLRyMB8Ey5Ph0D+6IdtfFVp9Jmcl52G1lBMMtknEmeWH3vvR+3iQxkIpxZaxdKg=; 25:5H55DS6soDvwUshVETx+19ZOpdPWN85Q+k2idrdza2yNH4O9uEb1FTP9jEIuKYP6OvcSY476MUP4ATVF2qGQudrsRbgam8RpF23TBtz5GjkcWqYo8LAb5Ql+USZCDRrqW5bCbqcPOivabgG7raHuZeAmjytHDTtHUWmaW4BBRJROSB/Bfu/4Yp9It0dwF4ZbM89+ZykSqXtzAulzHnsyGFpiWqCoBsP8IwcsHZ/HTdu4Y1uuzrvzEXrX2FsJRByX5ai6bV837HmRKTgLRF5jUA==; 23:AG737vMJZfQiuW27xmN3+EH2qQJTAfn4lqGrrNhmuUnH9P99yBvZe4G0/aw/vp2yXCqPUjxp0dbSb7W1UTtmLG7Gysjcq78nesGGTTlmDchwAOHlNoHn69WPvo6ZaJqzqguUsyajjJ9sjj0t+zWMvYS+PjjplHlyncyHaKinytzebJUWOratuNJCwBi97x5r X-OriginatorOrg: altera.com Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds Altera PCIe MSI driver. This soft IP supports configurable number of vectors, which is a dts parameter. Signed-off-by: Ley Foon Tan --- drivers/pci/host/Kconfig | 7 + drivers/pci/host/Makefile | 1 + drivers/pci/host/pcie-altera-msi.c | 318 +++++++++++++++++++++++++++++++++++++ 3 files changed, 326 insertions(+) create mode 100644 drivers/pci/host/pcie-altera-msi.c diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig index af19039..a8b87fd 100644 --- a/drivers/pci/host/Kconfig +++ b/drivers/pci/host/Kconfig @@ -154,4 +154,11 @@ config PCIE_ALTERA Say Y here if you want to enable PCIe controller support for Altera SoCFPGA family of SoCs. +config PCIE_ALTERA_MSI + bool "Altera PCIe MSI feature" + depends on PCI_MSI && PCIE_ALTERA + help + Say Y here if you want PCIe MSI support for the Altera SocFPGA SoC. + This MSI driver supports Altera MSI to GIC controller IP. + endmenu diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile index 6954f76..6c4913d 100644 --- a/drivers/pci/host/Makefile +++ b/drivers/pci/host/Makefile @@ -18,3 +18,4 @@ obj-$(CONFIG_PCIE_IPROC) += pcie-iproc.o obj-$(CONFIG_PCIE_IPROC_PLATFORM) += pcie-iproc-platform.o obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o obj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o +obj-$(CONFIG_PCIE_ALTERA_MSI) += pcie-altera-msi.o diff --git a/drivers/pci/host/pcie-altera-msi.c b/drivers/pci/host/pcie-altera-msi.c new file mode 100644 index 0000000..b852b51 --- /dev/null +++ b/drivers/pci/host/pcie-altera-msi.c @@ -0,0 +1,318 @@ +/* + * Copyright Altera Corporation (C) 2013-2015. All rights reserved + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MSI_STATUS 0x0 +#define MSI_ERROR 0x4 +#define MSI_INTMASK 0x8 + +#define MAX_MSI_VECTORS 32 +struct altera_msi { + DECLARE_BITMAP(used, MAX_MSI_VECTORS); + struct mutex lock; /* proctect used variable */ + struct platform_device *pdev; + struct irq_domain *msi_domain; + void __iomem *csr_base; + void __iomem *vector_base; + u32 vector_phy; + u32 num_of_vectors; + int irq; +}; + +static inline void msi_writel(struct altera_msi *msi, u32 value, u32 reg) +{ + writel(value, msi->csr_base + reg); +} + +static inline u32 msi_readl(struct altera_msi *msi, u32 reg) +{ + return readl(msi->csr_base + reg); +} + +static irqreturn_t altera_msi_isr(int irq, void *data) +{ + struct altera_msi *msi = data; + unsigned long status; + u32 num_of_vectors = msi->num_of_vectors; + u32 processed = 0; + u32 offset; + + do { + status = msi_readl(msi, MSI_STATUS); + if (!status) + break; + + do { + offset = find_first_bit(&status, num_of_vectors); + /* Dummy read from vector to clear the interrupt */ + readl(msi->vector_base + (offset * sizeof(u32))); + + irq = irq_find_mapping(msi->msi_domain->parent, offset); + if (irq) { + if (test_bit(offset, msi->used)) + generic_handle_irq(irq); + else + dev_info(&msi->pdev->dev, "unhandled MSI\n"); + } else + dev_info(&msi->pdev->dev, "unexpected MSI\n"); + + /* Clear the bit from status and repeat without reading + * again status register. */ + clear_bit(offset, &status); + processed++; + } while (status); + } while (1); + + return processed > 0 ? IRQ_HANDLED : IRQ_NONE; +} + +static struct irq_chip altera_msi_irq_chip = { + .name = "Altera PCIe MSI", + .irq_enable = pci_msi_unmask_irq, + .irq_disable = pci_msi_mask_irq, + .irq_mask = pci_msi_mask_irq, + .irq_unmask = pci_msi_unmask_irq, +}; + +static struct msi_domain_info altera_msi_domain_info = { + .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS), + .chip = &altera_msi_irq_chip, +}; + +static void altera_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) +{ + struct altera_msi *msi = irq_data_get_irq_chip_data(data); + u32 mask; + + msg->address_lo = msi->vector_phy + (data->hwirq * sizeof(u32)); + /* 32 bit address only */ + msg->address_hi = 0; + msg->data = data->hwirq; + + mask = msi_readl(msi, MSI_INTMASK); + mask |= 1 << data->hwirq; + msi_writel(msi, mask, MSI_INTMASK); + dev_dbg(&msi->pdev->dev, "msi#%d address_lo 0x%x\n", (int)data->hwirq, + msg->address_lo); +} + +static int altera_msi_set_affinity(struct irq_data *irq_data, + const struct cpumask *mask, bool force) +{ + return irq_set_affinity(irq_data->hwirq, mask); +} + +static struct irq_chip altera_msi_bottom_irq_chip = { + .name = "Altera MSI", + .irq_compose_msi_msg = altera_compose_msi_msg, + .irq_set_affinity = altera_msi_set_affinity, +}; + +static int altera_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, + unsigned int nr_irqs, void *args) +{ + struct altera_msi *msi = domain->host_data; + int bit; + + mutex_lock(&msi->lock); + + bit = find_first_zero_bit(msi->used, msi->num_of_vectors); + if (bit < msi->num_of_vectors) + set_bit(bit, msi->used); + else + bit = -ENOSPC; + + mutex_unlock(&msi->lock); + + if (bit < 0) + return bit; + + irq_domain_set_info(domain, virq, bit, &altera_msi_bottom_irq_chip, + domain->host_data, handle_simple_irq, + NULL, NULL); + set_irq_flags(virq, IRQF_VALID); + + return 0; +} + +static void altera_irq_domain_free(struct irq_domain *domain, + unsigned int virq, unsigned int nr_irqs) +{ + struct irq_data *d = irq_domain_get_irq_data(domain, virq); + struct altera_msi *msi = irq_data_get_irq_chip_data(d); + u32 mask; + + mutex_lock(&msi->lock); + + if (!test_bit(d->hwirq, msi->used)) + dev_err(&msi->pdev->dev, "trying to free unused MSI#%lu\n", + d->hwirq); + else { + clear_bit(d->hwirq, msi->used); + mask = msi_readl(msi, MSI_INTMASK); + mask &= ~(1 << d->hwirq); + msi_writel(msi, mask, MSI_INTMASK); + } + + mutex_unlock(&msi->lock); +} + +static const struct irq_domain_ops msi_domain_ops = { + .alloc = altera_irq_domain_alloc, + .free = altera_irq_domain_free, +}; + +static int altera_allocate_domains(struct altera_msi *msi) +{ + struct irq_domain *inner_domain; + + inner_domain = irq_domain_add_linear(NULL, msi->num_of_vectors, + &msi_domain_ops, msi); + if (!inner_domain) { + dev_err(&msi->pdev->dev, "failed to create IRQ domain\n"); + return -ENOMEM; + } + + msi->msi_domain = pci_msi_create_irq_domain( + msi->pdev->dev.of_node, + &altera_msi_domain_info, inner_domain); + if (!msi->msi_domain) { + dev_err(&msi->pdev->dev, "failed to create MSI domain\n"); + irq_domain_remove(inner_domain); + return -ENOMEM; + } + + return 0; +} + +static void altera_free_domains(struct altera_msi *msi) +{ + struct irq_domain *inner_domain = msi->msi_domain->parent; + + irq_domain_remove(msi->msi_domain); + irq_domain_remove(inner_domain); +} + +int altera_msi_probe(struct platform_device *pdev) +{ + struct altera_msi *msi; + struct device_node *np = pdev->dev.of_node; + struct resource *res; + int ret; + + msi = devm_kzalloc(&pdev->dev, sizeof(struct altera_msi), + GFP_KERNEL); + if (!msi) + return -ENOMEM; + + mutex_init(&msi->lock); + msi->pdev = pdev; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "csr"); + msi->csr_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(msi->csr_base)) { + dev_err(&pdev->dev, "get csr resource failed\n"); + return -EADDRNOTAVAIL; + } + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + "vector_slave"); + msi->vector_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(msi->vector_base)) { + dev_err(&pdev->dev, "get vector slave resource failed\n"); + return -EADDRNOTAVAIL; + } + + msi->vector_phy = res->start; + + if (of_property_read_u32(np, "num-vectors", &msi->num_of_vectors)) { + dev_err(&pdev->dev, "failed to parse the number of vectors\n"); + return -EINVAL; + } + + ret = altera_allocate_domains(msi); + if (ret) + return ret; + + msi->irq = platform_get_irq(pdev, 0); + if (msi->irq <= 0) { + dev_err(&pdev->dev, "failed to map IRQ: %d\n", msi->irq); + ret = -ENODEV; + goto err; + } + + ret = devm_request_irq(&pdev->dev, msi->irq, altera_msi_isr, 0, + altera_msi_irq_chip.name, msi); + if (ret) { + dev_err(&pdev->dev, "failed to request IRQ: %d\n", ret); + goto err; + } + + platform_set_drvdata(pdev, msi); + + return 0; + +err: + irq_domain_remove(msi->msi_domain); + return ret; +} + +static int altera_msi_remove(struct platform_device *pdev) +{ + struct altera_msi *msi = platform_get_drvdata(pdev); + + msi_writel(msi, 0, MSI_INTMASK); + + altera_free_domains(msi); + + platform_set_drvdata(pdev, NULL); + return 0; +} + +static const struct of_device_id altera_msi_of_match[] = { + { .compatible = "altr,msi-1.0", NULL }, + { }, +}; +MODULE_DEVICE_TABLE(of, altera_msi_of_match); + +static struct platform_driver altera_msi_driver = { + .driver = { + .name = "altera-msi", + .owner = THIS_MODULE, + .of_match_table = altera_msi_of_match, + }, + .probe = altera_msi_probe, + .remove = altera_msi_remove, +}; + +static int __init altera_msi_init(void) +{ + return platform_driver_register(&altera_msi_driver); +} + +subsys_initcall(altera_msi_init); + +MODULE_AUTHOR("Ley Foon Tan "); +MODULE_DESCRIPTION("Altera PCIe MSI support"); +MODULE_LICENSE("GPL v2");