From patchwork Tue Jul 28 13:46:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 6885641 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1CEFC9F358 for ; Tue, 28 Jul 2015 13:48:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 48D552022A for ; Tue, 28 Jul 2015 13:48:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 60B8A20149 for ; Tue, 28 Jul 2015 13:48:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752691AbbG1NrO (ORCPT ); Tue, 28 Jul 2015 09:47:14 -0400 Received: from foss.arm.com ([217.140.101.70]:59220 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932396AbbG1NrM (ORCPT ); Tue, 28 Jul 2015 09:47:12 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A9E2C619; Tue, 28 Jul 2015 06:47:21 -0700 (PDT) Received: from approximate.cambridge.arm.com (approximate.cambridge.arm.com [10.1.209.148]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 572633F21A; Tue, 28 Jul 2015 06:47:10 -0700 (PDT) From: Marc Zyngier To: Bjorn Helgaas , Thomas Gleixner , Jiang Liu , Jason Cooper Cc: , , , Yijing Wang , Ma Jun , Lorenzo Pieralisi , Duc Dang , Hanjun Guo Subject: [PATCH v6 17/19] irqchip: GICv2m: Add platform MSI support Date: Tue, 28 Jul 2015 14:46:24 +0100 Message-Id: <1438091186-10244-18-git-send-email-marc.zyngier@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1438091186-10244-1-git-send-email-marc.zyngier@arm.com> References: <1438091186-10244-1-git-send-email-marc.zyngier@arm.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In order to support non-PCI MSI with GICv2m, add the minimal required entry points for the MSI domain, which is actually almost nothing (we just use the defaults provided by the core code). Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v2m.c | 33 +++++++++++++++++++++++++-------- 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c index ec9c376..db04fc1 100644 --- a/drivers/irqchip/irq-gic-v2m.c +++ b/drivers/irqchip/irq-gic-v2m.c @@ -50,7 +50,6 @@ struct v2m_data { u32 spi_start; /* The SPI number that MSIs start */ u32 nr_spis; /* The number of SPIs for MSIs */ unsigned long *bm; /* MSI vector bitmap */ - struct irq_domain *domain; }; static void gicv2m_mask_msi_irq(struct irq_data *d) @@ -212,12 +211,25 @@ static bool is_msi_spi_valid(u32 base, u32 num) return true; } +static struct irq_chip gicv2m_pmsi_irq_chip = { + .name = "pMSI", +}; + +static struct msi_domain_ops gicv2m_pmsi_ops = { +}; + +static struct msi_domain_info gicv2m_pmsi_domain_info = { + .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS), + .ops = &gicv2m_pmsi_ops, + .chip = &gicv2m_pmsi_irq_chip, +}; + static int __init gicv2m_init_one(struct device_node *node, struct irq_domain *parent) { int ret; struct v2m_data *v2m; - struct irq_domain *inner_domain; + struct irq_domain *inner_domain, *pci_domain, *plat_domain; v2m = kzalloc(sizeof(struct v2m_data), GFP_KERNEL); if (!v2m) { @@ -270,10 +282,13 @@ static int __init gicv2m_init_one(struct device_node *node, inner_domain->bus_token = DOMAIN_BUS_NEXUS; inner_domain->parent = parent; - v2m->domain = pci_msi_create_irq_domain(node, &gicv2m_msi_domain_info, - inner_domain); - if (!v2m->domain) { - pr_err("Failed to create MSI domain\n"); + pci_domain = pci_msi_create_irq_domain(node, &gicv2m_msi_domain_info, + inner_domain); + plat_domain = platform_msi_create_irq_domain(node, + &gicv2m_pmsi_domain_info, + inner_domain); + if (!pci_domain || !plat_domain) { + pr_err("Failed to create MSI domains\n"); ret = -ENOMEM; goto err_free_domains; } @@ -287,8 +302,10 @@ static int __init gicv2m_init_one(struct device_node *node, return 0; err_free_domains: - if (v2m->domain) - irq_domain_remove(v2m->domain); + if (plat_domain) + irq_domain_remove(plat_domain); + if (pci_domain) + irq_domain_remove(pci_domain); if (inner_domain) irq_domain_remove(inner_domain); err_free_bm: