From patchwork Thu Aug 27 22:39:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keith Busch X-Patchwork-Id: 7088241 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C8741BEEC1 for ; Thu, 27 Aug 2015 22:39:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 01DA5209B9 for ; Thu, 27 Aug 2015 22:39:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A6B87209B8 for ; Thu, 27 Aug 2015 22:39:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932501AbbH0WjK (ORCPT ); Thu, 27 Aug 2015 18:39:10 -0400 Received: from mga01.intel.com ([192.55.52.88]:20537 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757222AbbH0WjJ (ORCPT ); Thu, 27 Aug 2015 18:39:09 -0400 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 27 Aug 2015 15:39:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,423,1437462000"; d="scan'208";a="792404932" Received: from dcgshare.lm.intel.com ([10.232.118.254]) by fmsmga002.fm.intel.com with ESMTP; 27 Aug 2015 15:39:08 -0700 Received: by dcgshare.lm.intel.com (Postfix, from userid 1017) id 2D86AE0C64; Thu, 27 Aug 2015 16:39:08 -0600 (MDT) From: Keith Busch To: x86@kernel.org, linux-kernel@vger.kernel.org Cc: Keith Busch , Bryan Veal , Dan Williams , linux-pci@vger.kernel.org Subject: [RFC PATCH 1/2] x86: PCI bus specific MSI operations Date: Thu, 27 Aug 2015 16:39:05 -0600 Message-Id: <1440715146-16578-2-git-send-email-keith.busch@intel.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1440715146-16578-1-git-send-email-keith.busch@intel.com> References: <1440715146-16578-1-git-send-email-keith.busch@intel.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds struct x86_msi_ops to x86's PCI sysdata. This gives a host bridge driver the option to provide alternate MSI Data Register and MSI-X Table Entry programming for devices in PCI domains that do not subscribe to usual "IOAPIC" format. Signed-off-by: Keith Busch CC: Bryan Veal CC: Dan Williams CC: x86@kernel.org CC: linux-kernel@vger.kernel.org CC: linux-pci@vger.kernel.org --- arch/x86/include/asm/pci.h | 3 +++ arch/x86/kernel/x86_init.c | 19 +++++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index 4625943..98f3802 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -20,6 +20,9 @@ struct pci_sysdata { #ifdef CONFIG_X86_64 void *iommu; /* IOMMU private data */ #endif +#ifdef CONFIG_PCI_MSI + struct x86_msi_ops *msi_ops; +#endif }; extern int pci_routeirq; diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c index 3839628..416de84 100644 --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -118,21 +118,40 @@ struct x86_msi_ops x86_msi = { /* MSI arch specific hooks */ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) { + struct pci_sysdata *sysdata = dev->bus->sysdata; + + if (sysdata && sysdata->msi_ops && sysdata->msi_ops->setup_msi_irqs) + return sysdata->msi_ops->setup_msi_irqs(dev, nvec, type); return x86_msi.setup_msi_irqs(dev, nvec, type); } void arch_teardown_msi_irqs(struct pci_dev *dev) { + struct pci_sysdata *sysdata = dev->bus->sysdata; + + if (sysdata && sysdata->msi_ops && sysdata->msi_ops->teardown_msi_irqs) + return sysdata->msi_ops->teardown_msi_irqs(dev); x86_msi.teardown_msi_irqs(dev); } void arch_teardown_msi_irq(unsigned int irq) { + struct msi_desc *desc = irq_get_msi_desc(irq); + struct pci_sysdata *sysdata = NULL; + + if (desc) + sysdata = desc->dev->bus->sysdata; + if (sysdata && sysdata->msi_ops && sysdata->msi_ops->teardown_msi_irq) + return sysdata->msi_ops->teardown_msi_irq(irq); x86_msi.teardown_msi_irq(irq); } void arch_restore_msi_irqs(struct pci_dev *dev) { + struct pci_sysdata *sysdata = dev->bus->sysdata; + + if (sysdata && sysdata->msi_ops && sysdata->msi_ops->restore_msi_irqs) + return sysdata->msi_ops->restore_msi_irqs(dev); x86_msi.restore_msi_irqs(dev); } #endif