| Message ID | 1446642770-4681-38-git-send-email-gwshan@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
> - rc = opal_pci_reset(phb->opal_id, > - OPAL_RESET_PHB_ERROR, > - OPAL_ASSERT_RESET); > - if (rc != OPAL_SUCCESS) { > - pr_warn("%s: Failure %lld clearing " > - "error injection registers\n", > - __func__, rc); This is very minor, but is there a good reason to change the error message from the one above to the one below? I just hesitate to change error messages that people might be grepping the source for without a good reason. > + if (rc != OPAL_SUCCESS) { > + pr_warn("%s: Error %lld clearing error injection\n", > + __func__, rc); Apart from that this looks good, pending me actually testing it :) Regards, Daniel
On Thu, Nov 12, 2015 at 04:11:12PM +1100, Daniel Axtens wrote: >> - rc = opal_pci_reset(phb->opal_id, >> - OPAL_RESET_PHB_ERROR, >> - OPAL_ASSERT_RESET); >> - if (rc != OPAL_SUCCESS) { >> - pr_warn("%s: Failure %lld clearing " >> - "error injection registers\n", >> - __func__, rc); > >This is very minor, but is there a good reason to change the error >message from the one above to the one below? I just hesitate to change >error messages that people might be grepping the source for without a >good reason. > About 3 years ago, I think the error message printed by pr_warn() can't exceed 80 lines each line. Otherwise, scripts/checkpatch.pl will report warnings. The error message spans multiple lines to avoid that. However, that turned to be wrong later. If people searchs the code from the error or warning message, it'd better to keep it in one line, not in multiple lines. That's the reason I merged them into one line since I have to refactor the function. At same time, the message is shortened as "Error" is shorter than "Failure" and "registers" in original message is meaningless. >> + if (rc != OPAL_SUCCESS) { >> + pr_warn("%s: Error %lld clearing error injection\n", >> + __func__, rc); > >Apart from that this looks good, pending me actually testing it :) > Thanks :-) Gavin >Regards, >Daniel > -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c index 861a7d2..a7d84a4 100644 --- a/arch/powerpc/platforms/powernv/eeh-powernv.c +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c @@ -907,8 +907,9 @@ void pnv_pci_reset_secondary_bus(struct pci_dev *dev) static int pnv_eeh_reset(struct eeh_pe *pe, int option) { struct pci_controller *hose = pe->phb; + struct pnv_phb *phb; struct pci_bus *bus; - int ret; + int64_t rc; /* * For PHB reset, we always have complete reset. For those PEs whose @@ -924,43 +925,35 @@ static int pnv_eeh_reset(struct eeh_pe *pe, int option) * reset. The side effect is that EEH core has to clear the frozen * state explicitly after BAR restore. */ - if (pe->type & EEH_PE_PHB) { - ret = pnv_eeh_phb_reset(hose, option); - } else { - struct pnv_phb *phb; - s64 rc; + if (pe->type & EEH_PE_PHB) + return pnv_eeh_phb_reset(hose, option); - /* - * The frozen PE might be caused by PAPR error injection - * registers, which are expected to be cleared after hitting - * frozen PE as stated in the hardware spec. Unfortunately, - * that's not true on P7IOC. So we have to clear it manually - * to avoid recursive EEH errors during recovery. - */ - phb = hose->private_data; - if (phb->model == PNV_PHB_MODEL_P7IOC && - (option == EEH_RESET_HOT || - option == EEH_RESET_FUNDAMENTAL)) { - rc = opal_pci_reset(phb->opal_id, - OPAL_RESET_PHB_ERROR, - OPAL_ASSERT_RESET); - if (rc != OPAL_SUCCESS) { - pr_warn("%s: Failure %lld clearing " - "error injection registers\n", - __func__, rc); - return -EIO; - } + /* + * The frozen PE might be caused by PAPR error injection + * registers, which are expected to be cleared after hitting + * frozen PE as stated in the hardware spec. Unfortunately, + * that's not true on P7IOC. So we have to clear it manually + * to avoid recursive EEH errors during recovery. + */ + phb = hose->private_data; + if (phb->model == PNV_PHB_MODEL_P7IOC && + (option == EEH_RESET_HOT || option == EEH_RESET_FUNDAMENTAL)) { + rc = opal_pci_reset(phb->opal_id, + OPAL_RESET_PHB_ERROR, + OPAL_ASSERT_RESET); + if (rc != OPAL_SUCCESS) { + pr_warn("%s: Error %lld clearing error injection\n", + __func__, rc); + return -EIO; } - - bus = eeh_pe_bus_get(pe); - if (pci_is_root_bus(bus) || - pci_is_root_bus(bus->parent)) - ret = pnv_eeh_root_reset(hose, option); - else - ret = pnv_eeh_bridge_reset(bus->self, option); } - return ret; + bus = eeh_pe_bus_get(pe); + if (pci_is_root_bus(bus) || + pci_is_root_bus(bus->parent)) + return pnv_eeh_root_reset(hose, option); + + return pnv_eeh_bridge_reset(bus->self, option); } /**
This drops unnecessary nested if statements in pnv_eeh_reset() to improve the code readability. After the changes, the unused local variable "ret" is dropped as well. No logical changes introduced. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> --- arch/powerpc/platforms/powernv/eeh-powernv.c | 61 ++++++++++++---------------- 1 file changed, 27 insertions(+), 34 deletions(-)