From patchwork Thu Dec 3 13:35:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanimir Varbanov X-Patchwork-Id: 7759921 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D0DBA9F30B for ; Thu, 3 Dec 2015 13:36:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 65E3C20513 for ; Thu, 3 Dec 2015 13:36:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8D8FA2050E for ; Thu, 3 Dec 2015 13:36:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760230AbbLCNgU (ORCPT ); Thu, 3 Dec 2015 08:36:20 -0500 Received: from mail-wm0-f42.google.com ([74.125.82.42]:38390 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760261AbbLCNgS (ORCPT ); Thu, 3 Dec 2015 08:36:18 -0500 Received: by wmec201 with SMTP id c201so22437372wme.1 for ; Thu, 03 Dec 2015 05:36:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=v7OglF5EqJldkiLfUP10lvnDqdAZe50ZyO5TIxqXSZk=; b=x25Uu+xJgbkKL4DHIlED9CBoSWuhlpb+oWcb9srmaissnlUJSw/T2GQXyx/IfMPK8m qsh6OuxxVp0dP19WkCy28YP1Qp23XZ543233WRu6TFGCfYaolL3/Rbj2MXqXe9DZaqBP FFcBFKcL23/Z5rekQE/7Kp9Gsc0Dm91SUR8jR7ADh0hoGLyh7Kp42/Ert2nvC36SPrbJ xZvgu3jrI44mIP4Wuhk50VXjBHlCELDCAHivUwnNubHGRgdflQ5CWSIJGyqia12qiZLJ pFhpzzp63C9LYDIaS0Fk3agMU7yrTUybwyc10THXF//xfeqjjBSLljir9lk7J+jMlhvv oNQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=v7OglF5EqJldkiLfUP10lvnDqdAZe50ZyO5TIxqXSZk=; b=YJOtl+75lXtazxXWsQlizCbOykFUHNE+LbJwmkr7JfUSuzwDyRU+s+ircyetUVmfYM N4xQ5tWLae/drBTJhy37qNAJcLm3g1jN/vu1AxEn5tEwy5u1oGj+2XdRe1kgs9P0xm5S FnXkMyimTEq4RCNO5G+nqV46gYjYSBdtFwo8+cZgck/X85V/pPWeCRNy08T1Fyh/PeR/ kvgkbYE2JWqR0rJW2TP84mqgE+UXWthqEeeJHFA6DDHYnG3TBpiZEZWZgaGcPkQJX88R JtWTLzOzlg+U1TKRnkHzz6KpjYuNVRIjogEz+qCEGE4EHGroadig9NNjV5rWGU0/r0hW OXKQ== X-Gm-Message-State: ALoCoQlG+/WDFOFSDTx9WhcyV8Ps4AeZKO6CE95AWanNJp5Cj4yZp0Ajy24P4Mw6K1vXaJzhIrj3 X-Received: by 10.194.188.11 with SMTP id fw11mr12647692wjc.146.1449149776933; Thu, 03 Dec 2015 05:36:16 -0800 (PST) Received: from mms734.qualcomm.mm-sol.com ([37.157.136.206]) by smtp.gmail.com with ESMTPSA id h189sm35769187wme.1.2015.12.03.05.36.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 Dec 2015 05:36:16 -0800 (PST) From: Stanimir Varbanov To: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, Bjorn Helgaas Cc: Srinivas Kandagatla , Rob Herring , Rob Herring , Mark Rutland , Pawel Moll , Ian Campbell , Arnd Bergmann , Jingoo Han , Pratyush Anand , Bjorn Andersson , Stanimir Varbanov Subject: [PATCH v4 5/5] ARM: dts: ifc6410: enable pcie dt node for this board Date: Thu, 3 Dec 2015 15:35:24 +0200 Message-Id: <1449149725-27607-6-git-send-email-stanimir.varbanov@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1449149725-27607-1-git-send-email-stanimir.varbanov@linaro.org> References: <1449149725-27607-1-git-send-email-stanimir.varbanov@linaro.org> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enable pcie dt node and fill pcie dt node with regulator, pinctrl and reset gpio, to use the pcie on the ifc6410 board. Signed-off-by: Stanimir Varbanov --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 11ac608b6d50..f203b94ee460 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -47,6 +47,18 @@ bias-disable; }; }; + + pcie_pins: pcie_pinmux { + mux { + pins = "gpio27"; + function = "gpio"; + }; + conf { + pins = "gpio27"; + drive-strength = <12>; + bias-disable; + }; + }; }; rpm@108000 { @@ -123,6 +135,10 @@ pm8921_lvs1: lvs1 { bias-pull-down; }; + + pm8921_lvs6: lvs6 { + bias-pull-down; + }; }; }; @@ -231,6 +247,16 @@ status = "okay"; }; + pci@1b500000 { + status = "ok"; + vdda-supply = <&pm8921_s3>; + vdda_phy-supply = <&pm8921_lvs6>; + vdda_refclk-supply = <&ext_3p3v>; + pinctrl-0 = <&pcie_pins>; + pinctrl-names = "default"; + perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>; + }; + qcom,ssbi@500000 { pmic@0 { gpio@150 {