From patchwork Thu Dec 17 07:59:29 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hannes Reinecke X-Patchwork-Id: 7870311 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 25C7D9F387 for ; Thu, 17 Dec 2015 08:00:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7BA36203E1 for ; Thu, 17 Dec 2015 08:00:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 92A062035E for ; Thu, 17 Dec 2015 08:00:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754894AbbLQH7f (ORCPT ); Thu, 17 Dec 2015 02:59:35 -0500 Received: from mx2.suse.de ([195.135.220.15]:48202 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753814AbbLQH7d (ORCPT ); Thu, 17 Dec 2015 02:59:33 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 93AF6ACB5; Thu, 17 Dec 2015 07:59:31 +0000 (UTC) From: Hannes Reinecke To: Bjorn Helgaas Cc: Alexander Duyck , Michal Kubecek , "Shane M. Seymour" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Hannes Reinecke , Bjorn Helgaas Subject: [PATCH 2/2] pci: Update VPD size with correct length Date: Thu, 17 Dec 2015 08:59:29 +0100 Message-Id: <1450339169-52542-3-git-send-email-hare@suse.de> X-Mailer: git-send-email 1.8.5.6 In-Reply-To: <1450339169-52542-1-git-send-email-hare@suse.de> References: <1450339169-52542-1-git-send-email-hare@suse.de> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP PCI-2.2 VPD entries have a maximum size of 32k, but might actually be smaller than that. To figure out the actual size one has to read the VPD area until the 'end marker' is reached. Trying to read VPD data beyond that marker results in 'interesting' effects, from simple read errors to crashing the card. And to make matters worse not every PCI card implements this properly, leaving us with no 'end' marker or even completely invalid data. This path modifies the size of the VPD attribute to the available size, and disables the VPD attribute altogether if no valid data could be read. Cc: Alexander Duyck Cc: Bjorn Helgaas Signed-off-by: Hannes Reinecke Tested-by: Shane Seymour --- drivers/pci/access.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/drivers/pci/access.c b/drivers/pci/access.c index 59ac36f..0a647b1 100644 --- a/drivers/pci/access.c +++ b/drivers/pci/access.c @@ -475,6 +475,56 @@ static const struct pci_vpd_ops pci_vpd_f0_ops = { .release = pci_vpd_pci22_release, }; +/** + * pci_vpd_size - determine actual size of Vital Product Data + * @dev: pci device struct + * @old_size: current assumed size, also maximum allowed size + * + */ +static size_t +pci_vpd_pci22_size(struct pci_dev *dev) +{ + size_t off = 0; + unsigned char header[1+2]; /* 1 byte tag, 2 bytes length */ + + while (off < PCI_VPD_PCI22_SIZE && + pci_read_vpd(dev, off, 1, header) == 1) { + unsigned char tag; + + if (header[0] & PCI_VPD_LRDT) { + /* Large Resource Data Type Tag */ + tag = pci_vpd_lrdt_tag(header); + /* Only read length from known tag items */ + if ((tag == PCI_VPD_LTIN_ID_STRING) || + (tag == PCI_VPD_LTIN_RO_DATA) || + (tag == PCI_VPD_LTIN_RW_DATA)) { + if (pci_read_vpd(dev, off+1, 2, + &header[1]) != 2) + return off + 1; + off += PCI_VPD_LRDT_TAG_SIZE + + pci_vpd_lrdt_size(header); + } + } else { + /* Short Resource Data Type Tag */ + off += PCI_VPD_SRDT_TAG_SIZE + + pci_vpd_srdt_size(header); + tag = pci_vpd_srdt_tag(header); + } + if (tag == PCI_VPD_STIN_END) /* End tag descriptor */ + return off; + if ((tag != PCI_VPD_LTIN_ID_STRING) && + (tag != PCI_VPD_LTIN_RO_DATA) && + (tag != PCI_VPD_LTIN_RW_DATA)) { + dev_dbg(&dev->dev, + "invalid %s vpd tag %02x at offset %zu.", + (header[0] & PCI_VPD_LRDT) ? "large" : "short", + tag, off); + break; + } + } + return 0; +} + int pci_vpd_pci22_init(struct pci_dev *dev) { struct pci_vpd_pci22 *vpd; @@ -497,6 +547,13 @@ int pci_vpd_pci22_init(struct pci_dev *dev) vpd->cap = cap; vpd->busy = false; dev->vpd = &vpd->base; + vpd->base.len = pci_vpd_pci22_size(dev); + if (vpd->base.len == 0) { + dev_dbg(&dev->dev, "Disabling VPD access."); + dev->vpd = NULL; + kfree(vpd); + return -ENXIO; + } return 0; }