From patchwork Mon Feb 8 00:00:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Gortmaker X-Patchwork-Id: 8245921 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 01926BEEE5 for ; Mon, 8 Feb 2016 00:03:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1CDC7201B4 for ; Mon, 8 Feb 2016 00:03:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E626F20173 for ; Mon, 8 Feb 2016 00:03:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754408AbcBHADr (ORCPT ); Sun, 7 Feb 2016 19:03:47 -0500 Received: from mail.windriver.com ([147.11.1.11]:53152 "EHLO mail.windriver.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752807AbcBHADr (ORCPT ); Sun, 7 Feb 2016 19:03:47 -0500 Received: from ALA-HCA.corp.ad.wrs.com (ala-hca.corp.ad.wrs.com [147.11.189.40]) by mail.windriver.com (8.15.2/8.15.1) with ESMTPS id u18018Lu001313 (version=TLSv1 cipher=AES128-SHA bits=128 verify=FAIL); Sun, 7 Feb 2016 16:01:08 -0800 (PST) Received: from yow-lpgnfs-02.corp.ad.wrs.com (128.224.149.8) by ALA-HCA.corp.ad.wrs.com (147.11.189.40) with Microsoft SMTP Server id 14.3.248.2; Sun, 7 Feb 2016 16:01:07 -0800 From: Paul Gortmaker To: CC: Paul Gortmaker , Jingoo Han , Pratyush Anand , Bjorn Helgaas , Geert Uytterhoeven , Stanimir Varbanov , Thierry Reding , Arnd Bergmann , Subject: [PATCH 3/5] drivers/pci: export dw syms enabling board specific PCI code to be tristate Date: Sun, 7 Feb 2016 19:00:42 -0500 Message-ID: <1454889644-27830-4-git-send-email-paul.gortmaker@windriver.com> X-Mailer: git-send-email 2.6.1 In-Reply-To: <1454889644-27830-1-git-send-email-paul.gortmaker@windriver.com> References: <1454889644-27830-1-git-send-email-paul.gortmaker@windriver.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP After converting the drivers who select PCI_DW from bool to tristate, the following symbols need to be exported, simply based on the output from modpost failures. Cc: Jingoo Han Cc: Pratyush Anand Cc: Bjorn Helgaas Cc: Geert Uytterhoeven Cc: Stanimir Varbanov Cc: Thierry Reding Cc: Arnd Bergmann Cc: linux-pci@vger.kernel.org Signed-off-by: Paul Gortmaker --- drivers/pci/host/pcie-designware.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index 21716827847a..65c0c81b8852 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c @@ -91,6 +91,7 @@ int dw_pcie_cfg_read(void __iomem *addr, int size, u32 *val) return PCIBIOS_SUCCESSFUL; } +EXPORT_SYMBOL(dw_pcie_cfg_read); int dw_pcie_cfg_write(void __iomem *addr, int size, u32 val) { @@ -108,6 +109,7 @@ int dw_pcie_cfg_write(void __iomem *addr, int size, u32 val) return PCIBIOS_SUCCESSFUL; } +EXPORT_SYMBOL(dw_pcie_cfg_write); static inline void dw_pcie_readl_rc(struct pcie_port *pp, u32 reg, u32 *val) { @@ -201,6 +203,7 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) return ret; } +EXPORT_SYMBOL(dw_handle_msi_irq); void dw_pcie_msi_init(struct pcie_port *pp) { @@ -215,6 +218,7 @@ void dw_pcie_msi_init(struct pcie_port *pp) dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, (u32)(msi_target >> 32 & 0xffffffff)); } +EXPORT_SYMBOL(dw_pcie_msi_init); static void dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq) { @@ -387,6 +391,7 @@ int dw_pcie_link_up(struct pcie_port *pp) return 0; } +EXPORT_SYMBOL(dw_pcie_link_up); static int dw_pcie_msi_map(struct irq_domain *domain, unsigned int irq, irq_hw_number_t hwirq) @@ -562,6 +567,7 @@ int dw_pcie_host_init(struct pcie_port *pp) pci_bus_add_devices(bus); return 0; } +EXPORT_SYMBOL(dw_pcie_host_init); static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) @@ -771,6 +777,7 @@ void dw_pcie_setup_rc(struct pcie_port *pp) PCI_COMMAND_MASTER | PCI_COMMAND_SERR; dw_pcie_writel_rc(pp, val, PCI_COMMAND); } +EXPORT_SYMBOL(dw_pcie_setup_rc); MODULE_AUTHOR("Jingoo Han "); MODULE_DESCRIPTION("Designware PCIe host controller driver");