From patchwork Fri Apr 8 00:16:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 8778211 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9BF21C0553 for ; Fri, 8 Apr 2016 00:17:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A635220107 for ; Fri, 8 Apr 2016 00:17:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AFA2320160 for ; Fri, 8 Apr 2016 00:17:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932390AbcDHARe (ORCPT ); Thu, 7 Apr 2016 20:17:34 -0400 Received: from aserp1040.oracle.com ([141.146.126.69]:42450 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932519AbcDHARb (ORCPT ); Thu, 7 Apr 2016 20:17:31 -0400 Received: from userv0022.oracle.com (userv0022.oracle.com [156.151.31.74]) by aserp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with ESMTP id u380HAQI010131 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 8 Apr 2016 00:17:11 GMT Received: from userv0122.oracle.com (userv0122.oracle.com [156.151.31.75]) by userv0022.oracle.com (8.14.4/8.13.8) with ESMTP id u380HAD8004566 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 8 Apr 2016 00:17:10 GMT Received: from abhmp0005.oracle.com (abhmp0005.oracle.com [141.146.116.11]) by userv0122.oracle.com (8.14.4/8.14.4) with ESMTP id u380HAUv019888; Fri, 8 Apr 2016 00:17:10 GMT Received: from aserv0022.oracle.com (/10.132.126.127) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Thu, 07 Apr 2016 17:17:09 -0700 From: Yinghai Lu To: Bjorn Helgaas , David Miller , Benjamin Herrenschmidt , Linus Torvalds Cc: Wei Yang , TJ , Yijing Wang , Khalid Aziz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu Subject: [PATCH v11 60/60] PCI: Only try to assign io port only for root bus that support it Date: Thu, 7 Apr 2016 17:16:13 -0700 Message-Id: <1460074573-7481-61-git-send-email-yinghai@kernel.org> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1460074573-7481-1-git-send-email-yinghai@kernel.org> References: <1460074573-7481-1-git-send-email-yinghai@kernel.org> X-Source-IP: userv0022.oracle.com [156.151.31.74] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The PCI subsystem always assumes that I/O is supported on root bus and tries to assign an I/O window to each child bus even if that is not the case. The use cases is on Intel 8 socket system that have 8 root buses, last two root buses would not have io port resources from _CRS. Check if root bus supports I/O, and later during sizing and assigning, check that flags and skip those resources. Signed-off-by: Yinghai Lu --- drivers/pci/probe.c | 6 ++++++ drivers/pci/setup-bus.c | 9 +++++++++ include/linux/pci.h | 1 + 3 files changed, 16 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 52ddc45..6f0488c 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -345,6 +345,9 @@ static void pci_read_bridge_io(struct pci_bus *child) struct pci_bus_region region; struct resource *res; + if (!pci_find_host_bridge(child)->has_ioport) + return; + io_mask = PCI_IO_RANGE_MASK; io_granularity = 0x1000; if (dev->io_window_1k) { @@ -2231,6 +2234,9 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus, bus_addr[0] = '\0'; dev_info(&b->dev, "root bus resource %pR%s\n", res, bus_addr); + if (resource_type(res) == IORESOURCE_IO) + bridge->has_ioport = 1; + if (resource_type(res) == IORESOURCE_MEM) { if ((res->end - offset) > 0xffffffff) bridge->has_mem64 = 1; diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index d07ba87..076b5db 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -225,6 +225,10 @@ static void pdev_assign_resources_prepare(struct pci_dev *dev, if (resource_disabled(r) || r->parent) continue; + if ((r->flags & IORESOURCE_IO) && + !pci_find_host_bridge(dev->bus)->has_ioport) + continue; + r_align = __pci_resource_alignment(dev, r, realloc_head); if (!r_align) { dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n", @@ -1188,6 +1192,11 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size, min_size = 0; } + if (!pci_find_host_bridge(bus)->has_ioport) { + b_res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED; + return; + } + min_align = window_alignment(bus, IORESOURCE_IO); list_for_each_entry(dev, &bus->devices, bus_list) { int i; diff --git a/include/linux/pci.h b/include/linux/pci.h index 41d06ce..463094a 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -409,6 +409,7 @@ struct pci_host_bridge { void *release_data; unsigned int ignore_reset_delay:1; /* for entire hierarchy */ unsigned int has_mem64:1; + unsigned int has_ioport:1; /* Resource alignment requirements */ resource_size_t (*align_resource)(struct pci_dev *dev, const struct resource *res,