From patchwork Mon Apr 18 05:51:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 8867991 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7417B9F443 for ; Mon, 18 Apr 2016 05:52:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 155E320204 for ; Mon, 18 Apr 2016 05:52:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E7A032022D for ; Mon, 18 Apr 2016 05:52:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751849AbcDRFvo (ORCPT ); Mon, 18 Apr 2016 01:51:44 -0400 Received: from mail-pf0-f169.google.com ([209.85.192.169]:36166 "EHLO mail-pf0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751804AbcDRFvn (ORCPT ); Mon, 18 Apr 2016 01:51:43 -0400 Received: by mail-pf0-f169.google.com with SMTP id e128so76990781pfe.3; Sun, 17 Apr 2016 22:51:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6Tz86CGRbzPC9wjKa5G6JxFDldNG+RCIxW88PEm1wn4=; b=KNfuvMwR9atlKyd8JS5nWK4ErhIrGopvep05BXuQUaHV9B00ktKEpEx08bliL9yL1T E7vvN/rUHhlR5AyMz86l4RSM6kp5+Z/ExaV017yoIuYQa2yuhFNB+XDdABwUcOJhRIiN 6qygG16ancsZYE/F1xkh3ak8IQB1RPshTSA6b/nlE/T6WyfBx6eKhmrKFHxKr13p08bH EX6G6PEdww430cJf0E1XANGTSuF2LtJRo1o0iHPwpZ4vEX6+9/+KO1MU3M3tKjHgEUmu FAh9S0URENqaAD23Ha+DmjrzMSnvGFoKfV1nkuaVhkY6XJ4F86xvLKwFXiF6Ppp5ihau 6i/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6Tz86CGRbzPC9wjKa5G6JxFDldNG+RCIxW88PEm1wn4=; b=U1Np+CzdLW8Q6hyfe2KLcTC3JSEFLbC2U2zJ3sHHnTQe8Ig7+3IkbaSeTMy7y9OGTC 51tWAPIUAs70o+wGZbWTI15vmHdqd/6waGYfzUucURpTfoH710lCqmRYeHn6lcMmQEtW 0U6BZptRc/3Tra3oDWMi6LxK3Q6BUgd39qfCLRTE32pnnjmk77yWaiDnXZU71b4HD+2u zsTrUYgMReZQctYnPJsJAayJ8zGN+kYDNAEmGOgVCpw3gZyzb9uxNc7oLhovLRiPEUIY MfTgnfCLEM6ahIpLUGKvZLKXote45E3gnc435bcmo0FfmOjpg8sR1n+JIYnAoIrbGk3a TGnA== X-Gm-Message-State: AOPr4FXWyLIsabII9bkQc2zRRsy5gU+tfxhGLBiA5kLhRkPuB3q3oGXnnmSrk0EzQBJO2w== X-Received: by 10.98.1.69 with SMTP id 66mr48207206pfb.10.1460958702839; Sun, 17 Apr 2016 22:51:42 -0700 (PDT) Received: from squirtle.localdomain.localdomain (c-73-225-163-254.hsd1.wa.comcast.net. [73.225.163.254]) by smtp.gmail.com with ESMTPSA id fv10sm26409045pad.40.2016.04.17.22.51.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 17 Apr 2016 22:51:42 -0700 (PDT) From: Andrey Smirnov To: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Andrey Smirnov , linux-kernel@vger.kernel.org, Bjorn Helgaas , Lucas Stach , Richard Zhu , gary.bisson@boundarydevices.com Subject: [PATCH v2 2/3] PCI: imx6: Implement reset sequence for i.MX6+ Date: Sun, 17 Apr 2016 22:51:16 -0700 Message-Id: <1460958677-10604-2-git-send-email-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1460958677-10604-1-git-send-email-andrew.smirnov@gmail.com> References: <1460958677-10604-1-git-send-email-andrew.smirnov@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP I.MX6+ has a dedicated bit for reseting PCIe core, which should be used instead of a regular reset sequence since using the latter will hang the SoC. This commit is based on c34068d48273e24d392d9a49a38be807954420ed from http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git Signed-off-by: Andrey Smirnov --- Changes since v1: - Patchset is rebased against https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=pci/host-imx6 - DTS files changes moved into a separate patch drivers/pci/host/pci-imx6.c | 28 ++++++++++++++++++++++++++-- include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 + 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index c570bbb..834c5b8 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -33,7 +33,8 @@ enum imx6_pcie_variants { IMX6Q, - IMX6SX + IMX6SX, + IMX6QP, }; struct imx6_pcie { @@ -253,6 +254,11 @@ static int imx6_pcie_assert_core_reset(struct pcie_port *pp) IMX6SX_GPR5_PCIE_BTNRST_RESET, IMX6SX_GPR5_PCIE_BTNRST_RESET); break; + case IMX6QP: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, + IMX6Q_GPR1_PCIE_SW_RST, + IMX6Q_GPR1_PCIE_SW_RST); + break; case IMX6Q: /* * If the bootloader already enabled the link we need some special @@ -307,6 +313,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_TEST_POWERDOWN, 0); break; + case IMX6QP: /* FALLTHROUGH */ case IMX6Q: /* power up core phy and enable ref clock */ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, @@ -367,9 +374,22 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp) gpiod_set_value_cansleep(imx6_pcie->reset_gpio, 1); } - if (imx6_pcie->variant == IMX6SX) + switch (imx6_pcie->variant) { + case IMX6SX: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, IMX6SX_GPR5_PCIE_BTNRST_RESET, 0); + break; + case IMX6QP: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, + IMX6Q_GPR1_PCIE_SW_RST, 0); + + usleep_range(200, 500); + break; + case IMX6Q: /* Nothing to do */ + break; + default: + BUG(); + } return 0; @@ -601,6 +621,9 @@ static int __init imx6_pcie_probe(struct platform_device *pdev) if (of_device_is_compatible(pp->dev->of_node, "fsl,imx6sx-pcie")) imx6_pcie->variant = IMX6SX; + else if (of_device_is_compatible(pp->dev->of_node, + "fsl,imx6qp-pcie")) + imx6_pcie->variant = IMX6QP; else imx6_pcie->variant = IMX6Q; @@ -697,6 +720,7 @@ static void imx6_pcie_shutdown(struct platform_device *pdev) static const struct of_device_id imx6_pcie_of_match[] = { { .compatible = "fsl,imx6q-pcie", }, { .compatible = "fsl,imx6sx-pcie", }, + { .compatible = "fsl,imx6qp-pcie", }, {}, }; MODULE_DEVICE_TABLE(of, imx6_pcie_of_match); diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index 238c8db..5b08e3c 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -95,6 +95,7 @@ #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_IOMUX BIT(0) #define IMX6Q_GPR1_PCIE_REQ_MASK (0x3 << 30) +#define IMX6Q_GPR1_PCIE_SW_RST BIT(29) #define IMX6Q_GPR1_PCIE_EXIT_L1 BIT(28) #define IMX6Q_GPR1_PCIE_RDY_L23 BIT(27) #define IMX6Q_GPR1_PCIE_ENTER_L1 BIT(26)