From patchwork Mon Aug 8 19:14:27 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keith Busch X-Patchwork-Id: 9269633 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D4FDC6075A for ; Mon, 8 Aug 2016 19:48:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C660120009 for ; Mon, 8 Aug 2016 19:48:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BB35B27AB2; Mon, 8 Aug 2016 19:48:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 49BBD20009 for ; Mon, 8 Aug 2016 19:48:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752786AbcHHTsO (ORCPT ); Mon, 8 Aug 2016 15:48:14 -0400 Received: from mga03.intel.com ([134.134.136.65]:31699 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752840AbcHHTOc (ORCPT ); Mon, 8 Aug 2016 15:14:32 -0400 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP; 08 Aug 2016 12:14:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,491,1464678000"; d="scan'208";a="745923888" Received: from dcgshare.lm.intel.com ([10.232.118.254]) by FMSMGA003.fm.intel.com with ESMTP; 08 Aug 2016 12:14:31 -0700 Received: by dcgshare.lm.intel.com (Postfix, from userid 1017) id 6C659E00EA; Mon, 8 Aug 2016 13:14:29 -0600 (MDT) From: Keith Busch To: linux-pci@vger.kernel.org, Bjorn Helgaas Cc: Wei Zhang , Jens Axboe , Keith Busch Subject: [PATCH 3/3] pcie/aer: Cache capability position Date: Mon, 8 Aug 2016 13:14:27 -0600 Message-Id: <1470683667-28418-4-git-send-email-keith.busch@intel.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1470683667-28418-1-git-send-email-keith.busch@intel.com> References: <1470683667-28418-1-git-send-email-keith.busch@intel.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This saves the postition of the error reporting capability so that it doesn't need to be rediscovered during error handling. Signed-off-by: Keith Busch --- drivers/pci/pcie/aer/aerdrv.c | 38 +++++++++++++++++--------------------- drivers/pci/pcie/aer/aerdrv.h | 1 + 2 files changed, 18 insertions(+), 21 deletions(-) diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c index 48d21e0..d05c864 100644 --- a/drivers/pci/pcie/aer/aerdrv.c +++ b/drivers/pci/pcie/aer/aerdrv.c @@ -122,7 +122,6 @@ static void set_downstream_devices_error_reporting(struct pci_dev *dev, static void aer_enable_rootport(struct aer_rpc *rpc) { struct pci_dev *pdev = rpc->rpd->port; - int aer_pos; u16 reg16; u32 reg32; @@ -134,14 +133,13 @@ static void aer_enable_rootport(struct aer_rpc *rpc) pcie_capability_clear_word(pdev, PCI_EXP_RTCTL, SYSTEM_ERROR_INTR_ON_MESG_MASK); - aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); /* Clear error status */ - pci_read_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, ®32); - pci_write_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, reg32); - pci_read_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, ®32); - pci_write_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, reg32); - pci_read_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, ®32); - pci_write_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, reg32); + pci_read_config_dword(pdev, rpc->pos + PCI_ERR_ROOT_STATUS, ®32); + pci_write_config_dword(pdev, rpc->pos + PCI_ERR_ROOT_STATUS, reg32); + pci_read_config_dword(pdev, rpc->pos + PCI_ERR_COR_STATUS, ®32); + pci_write_config_dword(pdev, rpc->pos + PCI_ERR_COR_STATUS, reg32); + pci_read_config_dword(pdev, rpc->pos + PCI_ERR_UNCOR_STATUS, ®32); + pci_write_config_dword(pdev, rpc->pos + PCI_ERR_UNCOR_STATUS, reg32); /* * Enable error reporting for the root port device and downstream port @@ -150,9 +148,9 @@ static void aer_enable_rootport(struct aer_rpc *rpc) set_downstream_devices_error_reporting(pdev, true); /* Enable Root Port's interrupt in response to error messages */ - pci_read_config_dword(pdev, aer_pos + PCI_ERR_ROOT_COMMAND, ®32); + pci_read_config_dword(pdev, rpc->pos + PCI_ERR_ROOT_COMMAND, ®32); reg32 |= ROOT_PORT_INTR_ON_MESG_MASK; - pci_write_config_dword(pdev, aer_pos + PCI_ERR_ROOT_COMMAND, reg32); + pci_write_config_dword(pdev, rpc->pos + PCI_ERR_ROOT_COMMAND, reg32); } /** @@ -165,7 +163,6 @@ static void aer_disable_rootport(struct aer_rpc *rpc) { struct pci_dev *pdev = rpc->rpd->port; u32 reg32; - int pos; /* * Disable error reporting for the root port device and downstream port @@ -173,15 +170,14 @@ static void aer_disable_rootport(struct aer_rpc *rpc) */ set_downstream_devices_error_reporting(pdev, false); - pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); /* Disable Root's interrupt in response to error messages */ - pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, ®32); + pci_read_config_dword(pdev, rpc->pos + PCI_ERR_ROOT_COMMAND, ®32); reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK; - pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, reg32); + pci_write_config_dword(pdev, rpc->pos + PCI_ERR_ROOT_COMMAND, reg32); /* Clear Root's error status reg */ - pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, ®32); - pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, reg32); + pci_read_config_dword(pdev, rpc->pos + PCI_ERR_ROOT_STATUS, ®32); + pci_write_config_dword(pdev, rpc->pos + PCI_ERR_ROOT_STATUS, reg32); } /** @@ -198,9 +194,7 @@ irqreturn_t aer_irq(int irq, void *context) struct aer_rpc *rpc = get_service_data(pdev); int next_prod_idx; unsigned long flags; - int pos; - pos = pci_find_ext_capability(pdev->port, PCI_EXT_CAP_ID_ERR); /* * Must lock access to Root Error Status Reg, Root Error ID Reg, * and Root error producer/consumer index @@ -208,15 +202,15 @@ irqreturn_t aer_irq(int irq, void *context) spin_lock_irqsave(&rpc->e_lock, flags); /* Read error status */ - pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_STATUS, &status); + pci_read_config_dword(pdev->port, rpc->pos + PCI_ERR_ROOT_STATUS, &status); if (!(status & (PCI_ERR_ROOT_UNCOR_RCV|PCI_ERR_ROOT_COR_RCV))) { spin_unlock_irqrestore(&rpc->e_lock, flags); return IRQ_NONE; } /* Read error source and clear error status */ - pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_ERR_SRC, &id); - pci_write_config_dword(pdev->port, pos + PCI_ERR_ROOT_STATUS, status); + pci_read_config_dword(pdev->port, rpc->pos + PCI_ERR_ROOT_ERR_SRC, &id); + pci_write_config_dword(pdev->port, rpc->pos + PCI_ERR_ROOT_STATUS, status); /* Store error source for later DPC handler */ next_prod_idx = rpc->prod_idx + 1; @@ -317,6 +311,8 @@ static int aer_probe(struct pcie_device *dev) return -ENOMEM; } + rpc->pos = pci_find_ext_capability(dev->port, PCI_EXT_CAP_ID_ERR); + /* Request IRQ ISR */ status = request_irq(dev->irq, aer_irq, IRQF_SHARED, "aerdrv", dev); if (status) { diff --git a/drivers/pci/pcie/aer/aerdrv.h b/drivers/pci/pcie/aer/aerdrv.h index 945c939..d7c586e 100644 --- a/drivers/pci/pcie/aer/aerdrv.h +++ b/drivers/pci/pcie/aer/aerdrv.h @@ -72,6 +72,7 @@ struct aer_rpc { * recovery on the same * root port hierarchy */ + int pos; /* position of AER capability */ }; struct aer_broadcast_data {