From patchwork Thu Sep 1 16:27:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajat Jain X-Patchwork-Id: 9309411 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C4E4560756 for ; Thu, 1 Sep 2016 16:27:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 04CCE294AD for ; Thu, 1 Sep 2016 16:27:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ED9CD294B2; Thu, 1 Sep 2016 16:27:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2B75E294AD for ; Thu, 1 Sep 2016 16:27:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753895AbcIAQ1x (ORCPT ); Thu, 1 Sep 2016 12:27:53 -0400 Received: from mail-pf0-f169.google.com ([209.85.192.169]:34404 "EHLO mail-pf0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753428AbcIAQ1x (ORCPT ); Thu, 1 Sep 2016 12:27:53 -0400 Received: by mail-pf0-f169.google.com with SMTP id p64so32921312pfb.1 for ; Thu, 01 Sep 2016 09:27:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=9S1Gjb37KNh8V2nK5N1DJpx+i2aE7a5DV89pr5+8JZU=; b=mgS8NqSJ0kNRcGVMKnNU44DibFnC/Ds0o9PVCRxFl+MTZAKl1rwg9N1s4/pzCGX5gu O0LYf31VGxIL9bUd5nF6ff6fDXgbkpV99f5S9/GxsWy7t58DlehpK/7EqgnSguD17LTN 24LsBR9nKwBWSzgxk6VFijvzHqKYssvHvlXdErrA2iF8jWCZWmSzEynANG0dPQn3GJP2 tdlJ62efIzxWkqDiW9+1YGrldXgwul87gALWOj956RYL6c8jL9kB74zI+1gUkcahcG2F yLMRxaErwP9l4fWNMHdTkgrg0ppbZ3gG88eXbUKB7Cqg1dQNIf0gufqQoC/k014gg5QV DzUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=9S1Gjb37KNh8V2nK5N1DJpx+i2aE7a5DV89pr5+8JZU=; b=BTTnLzOZ8Hd/K9JZFpEPvxmN8dufwlmBbz/T4YGW0ED9AfU+OfcBWOswY+LmM6ZEZE Y71RvIwt2l0Om84S6w9nMMwtgjqkez0Q61NswIxznyVlGHr705MuJVhQmLzkKJcaAC3w yjHimGwJTQ5Qrd7ZJ/YxQaVg+RvVRJ7kXuwI20ewYPG/md4+Q6WMtw7/BIFWkona0V8e mdM3tuXzxPGfFLCAnWOtUe1mVvMwf9VU4BZtTSFIpVerH2atBJ8SUMrG1mde92CFYOLG ycexsWVJXPdr5eBJLeCrOaupBj4z+qLgkro7gHcLQbxJy7J83r+z9VAdR/1Ewwm63Axm 9Z+Q== X-Gm-Message-State: AE9vXwMMIeqnZJb9vz66758tSUHGvL943YNZrsYlxq8W9OiAbwjs1IazGWXrHQQes9oj3kqH X-Received: by 10.98.92.65 with SMTP id q62mr28217370pfb.70.1472747272268; Thu, 01 Sep 2016 09:27:52 -0700 (PDT) Received: from rajat.mtv.corp.google.com ([172.22.64.13]) by smtp.gmail.com with ESMTPSA id q9sm7568577pfi.53.2016.09.01.09.27.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 01 Sep 2016 09:27:51 -0700 (PDT) From: Rajat Jain To: Martin Mares , bhelgaas@google.com, linux-pci@vger.kernel.org, David Box Cc: Rajat Jain , rajatxjain@gmail.com, briannorris@google.com Subject: [PATCH] lspci: Parse all the L1 PM substate capability regs Date: Thu, 1 Sep 2016 09:27:28 -0700 Message-Id: <1472747248-60993-1-git-send-email-rajatja@google.com> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Parse the control registers to display all the L1 PM substate configuration information. Signed-off-by: Rajat Jain --- I tested it on my Rockchip hardware that shows it correctly. I couldn't figure out how to "test" the tests (is there a documentation / example on running tests?), and hence left tests/cap-l1-pm unchanged. lib/header.h | 14 +++++++++ ls-ecaps.c | 92 ++++++++++++++++++++++++++++++++++++++++++------------------ 2 files changed, 78 insertions(+), 28 deletions(-) diff --git a/lib/header.h b/lib/header.h index 1c5968b..0341ec6 100644 --- a/lib/header.h +++ b/lib/header.h @@ -1117,6 +1117,20 @@ #define PCI_DPC_STS_PIO_FEP(x) (((x) >> 8) & 0x1f) /* DPC PIO First Error Pointer */ #define PCI_DPC_SOURCE 10 /* DPC Source ID */ +/* L1 PM Substates Extended Capability */ +#define PCI_L1PM_SUBSTAT_CAP 0x4 /* L1 PM Substate Capability */ +#define PCI_L1PM_SUBSTAT_CAP_PM_L12 0x1 /* PCI-PM L1.2 Supported */ +#define PCI_L1PM_SUBSTAT_CAP_PM_L11 0x2 /* PCI-PM L1.1 Supported */ +#define PCI_L1PM_SUBSTAT_CAP_ASPM_L12 0x4 /* ASPM L1.2 Supported */ +#define PCI_L1PM_SUBSTAT_CAP_ASPM_L11 0x8 /* ASPM L1.1 Supported */ +#define PCI_L1PM_SUBSTAT_CAP_L1PM_SUPP 0x16 /* L1 Pm Substates supported */ +#define PCI_L1PM_SUBSTAT_CTL1 0x8 /* L1 PM Substate Control 1 */ +#define PCI_L1PM_SUBSTAT_CTL1_PM_L12 0x1 /* PCI-PM L1.2 Enable */ +#define PCI_L1PM_SUBSTAT_CTL1_PM_L11 0x2 /* PCI-PM L1.1 Enable */ +#define PCI_L1PM_SUBSTAT_CTL1_ASPM_L12 0x4 /* ASPM L1.2 Enable */ +#define PCI_L1PM_SUBSTAT_CTL1_ASPM_L11 0x8 /* ASPM L1.1 Enable */ +#define PCI_L1PM_SUBSTAT_CTL2 0xC /* L1 PM Substate Control 2 */ + /* * The PCI interface treats multi-function devices as independent * devices. The slot/function address of each device is encoded diff --git a/ls-ecaps.c b/ls-ecaps.c index 5e18e06..7705930 100644 --- a/ls-ecaps.c +++ b/ls-ecaps.c @@ -527,55 +527,91 @@ cap_evendor(struct device *d, int where) BITS(hdr, 20, 12)); } +static inline int l1pm_scale_value(int scale, int value) +{ + switch (scale) + { + case 0: + return 2 * value; + case 1: + return 10 * value; + case 2: + return 100 * value; + } + return -1; +} + static void cap_l1pm(struct device *d, int where) { - u32 l1_cap; - int power_on_scale; + u32 l1_cap, val; + int time; printf("L1 PM Substates\n"); if (verbose < 2) return; - if (!config_fetch(d, where + 4, 4)) + if (!config_fetch(d, where + PCI_L1PM_SUBSTAT_CAP, 12)) { printf("\t\t\n"); return; } - l1_cap = get_conf_long(d, where + 4); + l1_cap = get_conf_long(d, where + PCI_L1PM_SUBSTAT_CAP); printf("\t\tL1SubCap: "); printf("PCI-PM_L1.2%c PCI-PM_L1.1%c ASPM_L1.2%c ASPM_L1.1%c L1_PM_Substates%c\n", - FLAG(l1_cap, 1), - FLAG(l1_cap, 2), - FLAG(l1_cap, 4), - FLAG(l1_cap, 8), - FLAG(l1_cap, 16)); - - if (BITS(l1_cap, 0, 1) || BITS(l1_cap, 2, 1)) + FLAG(l1_cap, PCI_L1PM_SUBSTAT_CAP_PM_L12), + FLAG(l1_cap, PCI_L1PM_SUBSTAT_CAP_PM_L11), + FLAG(l1_cap, PCI_L1PM_SUBSTAT_CAP_ASPM_L12), + FLAG(l1_cap, PCI_L1PM_SUBSTAT_CAP_ASPM_L11), + FLAG(l1_cap, PCI_L1PM_SUBSTAT_CAP_L1PM_SUPP)); + + if (l1_cap & PCI_L1PM_SUBSTAT_CAP_PM_L12 || + l1_cap & PCI_L1PM_SUBSTAT_CAP_ASPM_L12) { printf("\t\t\t PortCommonModeRestoreTime=%dus ", BITS(l1_cap, 8,8)); - power_on_scale = BITS(l1_cap, 16, 2); + time = l1pm_scale_value(BITS(l1_cap, 16, 2), BITS(l1_cap, 19, 5)); + if (time != -1) + printf("PortTPowerOnTime=%dus\n", time); + else + printf("PortTPowerOnTime=\n"); + } - printf("PortTPowerOnTime="); - switch (power_on_scale) - { - case 0: - printf("%dus\n", BITS(l1_cap, 19, 5) * 2); - break; - case 1: - printf("%dus\n", BITS(l1_cap, 19, 5) * 10); - break; - case 2: - printf("%dus\n", BITS(l1_cap, 19, 5) * 100); - break; - default: - printf("\n"); - break; - } + val = get_conf_long(d, where + PCI_L1PM_SUBSTAT_CTL1); + printf("\t\tL1SubCtl1: "); + printf("PCI-PM_L1.2%c PCI-PM_L1.1%c ASPM_L1.2%c ASPM_L1.1%c\n", + FLAG(val, PCI_L1PM_SUBSTAT_CTL1_PM_L12), + FLAG(val, PCI_L1PM_SUBSTAT_CTL1_PM_L11), + FLAG(val, PCI_L1PM_SUBSTAT_CTL1_ASPM_L12), + FLAG(val, PCI_L1PM_SUBSTAT_CTL1_ASPM_L11)); + + if (l1_cap & PCI_L1PM_SUBSTAT_CAP_PM_L12 || + l1_cap & PCI_L1PM_SUBSTAT_CAP_ASPM_L12) + printf("\t\t\t T_CommonMode=%dus ", + BITS(val, 8,8)); + + if (l1_cap & PCI_L1PM_SUBSTAT_CAP_ASPM_L12) + { + time = l1pm_scale_value(BITS(val, 29, 3), BITS(val, 16, 10)); + if (time != -1) + printf("LTR1.2_Threshhold=%dus\n", time); + else + printf("LTR1.2_Threshhold=\n"); + } + + val = get_conf_long(d, where + PCI_L1PM_SUBSTAT_CTL2); + printf("\t\tL1SubCtl2: "); + if (l1_cap & PCI_L1PM_SUBSTAT_CAP_PM_L12 || + l1_cap & PCI_L1PM_SUBSTAT_CAP_ASPM_L12) + { + time = l1pm_scale_value(BITS(val, 0, 2), BITS(val, 3, 5)); + if (time != -1) + printf("T_PwrOn=%dus\n", time); + else + printf("T_PwrOn=\n"); } }