| Message ID | 1479421501-31029-1-git-send-email-ddaney.cavm@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
On 11/17/2016 02:25 PM, David Daney wrote: > From: David Daney <david.daney@cavium.com> > > Some (defective) PCIe devices are not able to reliably do link > retraining. > > Check to see if ASPM is possible between link partners before > configuring common clocking, and doing the resulting link retraining. > If ASPM is not possible, there is no reason to risk losing access to a > device due to an unnecessary link retraining. > Hi Bjorn, It has been a couple of weeks since I originally sent this, and I wanted to know if you have had a chance to look at it. If possible, it would be nice to consider for the approaching merge window. Thanks, David Daney > Signed-off-by: David Daney <david.daney@cavium.com> > --- > drivers/pci/pcie/aspm.c | 18 ++++++++++++++++-- > 1 file changed, 16 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c > index 0ec649d..d6667db 100644 > --- a/drivers/pci/pcie/aspm.c > +++ b/drivers/pci/pcie/aspm.c > @@ -351,12 +351,26 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) > return; > } > > + /* Get upstream/downstream components' register state */ > + pcie_get_aspm_reg(parent, &upreg); > + child = list_entry(linkbus->devices.next, struct pci_dev, bus_list); > + pcie_get_aspm_reg(child, &dwreg); > + > + /* > + * If ASPM not supported, don't mess with the clocks and link, > + * bail out now. > + */ > + if (!(upreg.support & dwreg.support)) > + return; > + > /* Configure common clock before checking latencies */ > pcie_aspm_configure_common_clock(link); > > - /* Get upstream/downstream components' register state */ > + /* > + * Re-read upstream/downstream components' register state > + * after clock configuration > + */ > pcie_get_aspm_reg(parent, &upreg); > - child = list_entry(linkbus->devices.next, struct pci_dev, bus_list); > pcie_get_aspm_reg(child, &dwreg); > > /* > -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi David, On Wed, Nov 30, 2016 at 09:11:11AM -0800, David Daney wrote: > On 11/17/2016 02:25 PM, David Daney wrote: > >From: David Daney <david.daney@cavium.com> > > > >Some (defective) PCIe devices are not able to reliably do link > >retraining. > > > >Check to see if ASPM is possible between link partners before > >configuring common clocking, and doing the resulting link retraining. > >If ASPM is not possible, there is no reason to risk losing access to a > >device due to an unnecessary link retraining. > > > > Hi Bjorn, > > It has been a couple of weeks since I originally sent this, and I > wanted to know if you have had a chance to look at it. If possible, > it would be nice to consider for the approaching merge window. Yes, definitely. I haven't had a chance yet, but I hope to. Right now my top priority is getting the arm64 ECAM quirks in for v4.10. Once that's settled I'll come back and pick up some of these fixes. Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, Nov 17, 2016 at 02:25:01PM -0800, David Daney wrote: > From: David Daney <david.daney@cavium.com> > > Some (defective) PCIe devices are not able to reliably do link > retraining. > > Check to see if ASPM is possible between link partners before > configuring common clocking, and doing the resulting link retraining. > If ASPM is not possible, there is no reason to risk losing access to a > device due to an unnecessary link retraining. > > Signed-off-by: David Daney <david.daney@cavium.com> Applied to pci/aspm for v4.10, thanks, David! > --- > drivers/pci/pcie/aspm.c | 18 ++++++++++++++++-- > 1 file changed, 16 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c > index 0ec649d..d6667db 100644 > --- a/drivers/pci/pcie/aspm.c > +++ b/drivers/pci/pcie/aspm.c > @@ -351,12 +351,26 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) > return; > } > > + /* Get upstream/downstream components' register state */ > + pcie_get_aspm_reg(parent, &upreg); > + child = list_entry(linkbus->devices.next, struct pci_dev, bus_list); > + pcie_get_aspm_reg(child, &dwreg); > + > + /* > + * If ASPM not supported, don't mess with the clocks and link, > + * bail out now. > + */ > + if (!(upreg.support & dwreg.support)) > + return; > + > /* Configure common clock before checking latencies */ > pcie_aspm_configure_common_clock(link); > > - /* Get upstream/downstream components' register state */ > + /* > + * Re-read upstream/downstream components' register state > + * after clock configuration > + */ > pcie_get_aspm_reg(parent, &upreg); > - child = list_entry(linkbus->devices.next, struct pci_dev, bus_list); > pcie_get_aspm_reg(child, &dwreg); > > /* > -- > 1.7.11.7 > > -- > To unsubscribe from this list: send the line "unsubscribe linux-pci" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 0ec649d..d6667db 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -351,12 +351,26 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) return; } + /* Get upstream/downstream components' register state */ + pcie_get_aspm_reg(parent, &upreg); + child = list_entry(linkbus->devices.next, struct pci_dev, bus_list); + pcie_get_aspm_reg(child, &dwreg); + + /* + * If ASPM not supported, don't mess with the clocks and link, + * bail out now. + */ + if (!(upreg.support & dwreg.support)) + return; + /* Configure common clock before checking latencies */ pcie_aspm_configure_common_clock(link); - /* Get upstream/downstream components' register state */ + /* + * Re-read upstream/downstream components' register state + * after clock configuration + */ pcie_get_aspm_reg(parent, &upreg); - child = list_entry(linkbus->devices.next, struct pci_dev, bus_list); pcie_get_aspm_reg(child, &dwreg); /*