From patchwork Wed Jan 4 07:00:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhou Wang X-Patchwork-Id: 9496145 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 17EA2606B4 for ; Wed, 4 Jan 2017 06:29:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0AFA526E51 for ; Wed, 4 Jan 2017 06:29:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F37BD271FD; Wed, 4 Jan 2017 06:29:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 012B52711E for ; Wed, 4 Jan 2017 06:29:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757037AbdADG3y (ORCPT ); Wed, 4 Jan 2017 01:29:54 -0500 Received: from szxga01-in.huawei.com ([58.251.152.64]:29897 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751670AbdADG3y (ORCPT ); Wed, 4 Jan 2017 01:29:54 -0500 Received: from 172.24.1.136 (EHLO szxeml427-hub.china.huawei.com) ([172.24.1.136]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DXK14735; Wed, 04 Jan 2017 14:29:03 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by szxeml427-hub.china.huawei.com (10.82.67.182) with Microsoft SMTP Server id 14.3.235.1; Wed, 4 Jan 2017 14:28:53 +0800 From: Zhou Wang To: "Rafael J. Wysocki" , Len Brown , Tomasz Nowicki , Jayachandran C , Lorenzo Pieralisi , jorn Helgaas CC: , , , , , , Zhou Wang Subject: [PATCH] ACPI/PCI: Fix bus range comparation in pci_mcfg_lookup Date: Wed, 4 Jan 2017 15:00:06 +0800 Message-ID: <1483513206-113046-1-git-send-email-wangzhou1@hisilicon.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090205.586C9630.00F6, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 9f418b6dba4a4f9a5b48079502127b9d Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The configuration data provided by an MCFG region (ie PCI segment and bus range) may span multiple host bridges. Current code in pci_mcfg_lookup() carries out an exact match of host bridge bus range start value against the MCFG region(s) bus range start value which would cause configurations like the following: MCFG region: bus range: 0x00~0xff. segment: 0. PCI host bridges configuration (segment numbers and bus ranges): host bridge 1: bus range: 0x00~0x1f. segment: 0. host bridge 2: bus range: 0x20~0x4f. segment: 0. to fail, in that the bus range start value for host bridge 2 does not match the bus range start value of the respective MCFG region. Relax the bus range check in pci_mcfg_lookup() to cater for PCI configurations with multiple host bridges sharing the same MCFG region. Signed-off-by: Zhou Wang Reviewed-by: Tomasz Nowicki Acked-by: Lorenzo Pieralisi --- drivers/acpi/pci_mcfg.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c index a6a4cea..2944353 100644 --- a/drivers/acpi/pci_mcfg.c +++ b/drivers/acpi/pci_mcfg.c @@ -195,11 +195,10 @@ int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres, goto skip_lookup; /* - * We expect exact match, unless MCFG entry end bus covers more than - * specified by caller. + * We expect the range in bus_res in the coverage of MCFG bus range. */ list_for_each_entry(e, &pci_mcfg_list, list) { - if (e->segment == seg && e->bus_start == bus_res->start && + if (e->segment == seg && e->bus_start <= bus_res->start && e->bus_end >= bus_res->end) { root->mcfg_addr = e->addr; }