From patchwork Fri May 5 08:36:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oza Pawandeep X-Patchwork-Id: 9713161 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 06D47602B9 for ; Fri, 5 May 2017 08:37:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 01A052861E for ; Fri, 5 May 2017 08:37:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EA81C28630; Fri, 5 May 2017 08:37:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_HI,RCVD_IN_SORBS_SPAM autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D61382861E for ; Fri, 5 May 2017 08:37:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755831AbdEEIhb (ORCPT ); Fri, 5 May 2017 04:37:31 -0400 Received: from mail-qk0-f169.google.com ([209.85.220.169]:34033 "EHLO mail-qk0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755749AbdEEIh2 (ORCPT ); Fri, 5 May 2017 04:37:28 -0400 Received: by mail-qk0-f169.google.com with SMTP id k74so30025811qke.1 for ; Fri, 05 May 2017 01:37:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xj+GDn5nxpbshq0AYAKDOyi2//3l6UKIibbLtWvOQpw=; b=Ke+/v1iL1qvfVvO5u3LnmtUGyLk2fJIzTSDL+1a5Yx5WACcnok9qNT0JyZFi4h2xEY y88U5eA6Mi6gRhJG+Tp/brGCh1+0S7u7bbuvMDlJU9r/exIB4j18KG4AgqjDaQ1uDeeJ Iq3bKbB5M5VTl6dGDvp+FIwDXRNn73UZV2Wc0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xj+GDn5nxpbshq0AYAKDOyi2//3l6UKIibbLtWvOQpw=; b=B53EwMK4N/kpy1rtSl4vjSeha0+samc9cEZa7GlDYLgt6ixAOYqx6xYpag+SuTv3Ur bqsWPt7u6z2//WTPnQb3LqnwbsoAEtOSIUFX6Sjyic5MY5Rfcahj4xoaQQZT2vfTXnnd J9iVuQX6vubqPm9Fsi3GBR8FxqTKeayW2lRbgPoH6PbutzKqeHXweYf+guA00Nnpbx18 xHExzb03fMgQdaDUhx/3butzYIdmcmBTRswvB4QwZShR6p2DLgY9aWfy+pDuWzqBIGY1 7pZx8MrWkp9frMpPk4R+tUkUWUT7RUzc/WK3DCdOkhGM8UV2mg+I820jgZH74NGTmuxs uI+Q== X-Gm-Message-State: AODbwcABLhoYr7woMevcJ83YX8N5rjAnHF+vN1SZZcDJfT6RQDZ2k0vl YLuQiCrhbZXmI6Tz X-Received: by 10.55.176.135 with SMTP id z129mr11391866qke.308.1493973441982; Fri, 05 May 2017 01:37:21 -0700 (PDT) Received: from anjanavk-OptiPlex-7010.dhcp.avagotech.net ([192.19.237.250]) by smtp.gmail.com with ESMTPSA id t45sm3035564qtt.9.2017.05.05.01.37.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 May 2017 01:37:21 -0700 (PDT) From: Oza Pawandeep To: Joerg Roedel , Robin Murphy Cc: iommu@lists.linux-foundation.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, Oza Pawandeep , Oza Pawandeep Subject: [PATCH v2 3/3] PCI/of fix of_dma_get_range; get PCI specific dma-ranges Date: Fri, 5 May 2017 14:06:12 +0530 Message-Id: <1493973372-13883-3-git-send-email-oza.oza@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493973372-13883-1-git-send-email-oza.oza@broadcom.com> References: <1493973372-13883-1-git-send-email-oza.oza@broadcom.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP current device framework and OF framework integration assumes dma-ranges in a way where memory-mapped devices define their dma-ranges. (child-bus-address, parent-bus-address, length). of_dma_configure is specifically written to take care of memory mapped devices. but no implementation exists for pci to take care of pcie based memory ranges. for e.g. iproc based SOCs and other SOCs(suc as rcar) have PCI world dma-ranges. dma-ranges = <0x43000000 0x00 0x00 0x00 0x00 0x80 0x00>; this patch fixes the bug in of_dma_get_range, which with as is, parses the PCI memory ranges and return wrong size as 0. in order to get largest possible dma_mask. this patch also retuns the largest possible size based on dma-ranges, for e.g. dma-ranges = <0x43000000 0x00 0x00 0x00 0x00 0x80 0x00>; we should get dev->coherent_dma_mask=0x7fffffffff. based on which IOVA allocation space will honour PCI host bridge limitations. the implementation hooks bus specific callbacks for getting dma-ranges. Signed-off-by: Oza Pawandeep diff --git a/drivers/of/address.c b/drivers/of/address.c index 02b2903..cc0fc28 100644 --- a/drivers/of/address.c +++ b/drivers/of/address.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -46,6 +47,8 @@ struct of_bus { int na, int ns, int pna); int (*translate)(__be32 *addr, u64 offset, int na); unsigned int (*get_flags)(const __be32 *addr); + int (*get_dma_ranges)(struct device_node *np, + u64 *dma_addr, u64 *paddr, u64 *size); }; /* @@ -171,6 +174,146 @@ static int of_bus_pci_translate(__be32 *addr, u64 offset, int na) { return of_bus_default_translate(addr + 1, offset, na - 1); } + +static int of_bus_pci_get_dma_ranges(struct device_node *np, u64 *dma_addr, + u64 *paddr, u64 *size) +{ + struct device_node *node = of_node_get(np); + int ret = 0; + struct resource_entry *window; + LIST_HEAD(res); + + if (!node) + return -EINVAL; + + if (of_bus_pci_match(np)) { + *size = 0; + /* + * PCI dma-ranges is not mandatory property. + * many devices do no need to have it, since + * host bridge does not require inbound memory + * configuration or rather have design limitations. + * so we look for dma-ranges, if missing we + * just return the caller full size, and also + * no dma-ranges suggests that, host bridge allows + * whatever comes in, so we set dma_addr to 0. + */ + ret = of_pci_get_dma_ranges(np, &res); + if (!ret) { + resource_list_for_each_entry(window, &res) { + struct resource *res_dma = window->res; + + if (*size < resource_size(res_dma)) { + *dma_addr = res_dma->start - window->offset; + *paddr = res_dma->start; + *size = resource_size(res_dma); + } + } + } + pci_free_resource_list(&res); + + /* + * return the largest possible size, + * since PCI master allows everything. + */ + if (*size == 0) { + pr_debug("empty/zero size dma-ranges found for node(%s)\n", + np->full_name); + *size = DMA_BIT_MASK(sizeof(dma_addr_t) * 8) - 1; + *dma_addr = *paddr = 0; + ret = 0; + } + + pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n", + *dma_addr, *paddr, *size); + } + + of_node_put(node); + + return ret; +} + +static int get_dma_ranges(struct device_node *np, u64 *dma_addr, + u64 *paddr, u64 *size) +{ + struct device_node *node = of_node_get(np); + const __be32 *ranges = NULL; + int len, naddr, nsize, pna; + int ret = 0; + u64 dmaaddr; + + if (!node) + return -EINVAL; + + while (1) { + naddr = of_n_addr_cells(node); + nsize = of_n_size_cells(node); + node = of_get_next_parent(node); + if (!node) + break; + + ranges = of_get_property(node, "dma-ranges", &len); + + /* Ignore empty ranges, they imply no translation required */ + if (ranges && len > 0) + break; + + /* + * At least empty ranges has to be defined for parent node if + * DMA is supported + */ + if (!ranges) + break; + } + + if (!ranges) { + pr_debug("no dma-ranges found for node(%s)\n", np->full_name); + ret = -ENODEV; + goto out; + } + + len /= sizeof(u32); + + pna = of_n_addr_cells(node); + + /* dma-ranges format: + * DMA addr : naddr cells + * CPU addr : pna cells + * size : nsize cells + */ + dmaaddr = of_read_number(ranges, naddr); + *paddr = of_translate_dma_address(np, ranges); + if (*paddr == OF_BAD_ADDR) { + pr_err("translation of DMA address(%pad) to CPU address failed node(%s)\n", + dma_addr, np->full_name); + ret = -EINVAL; + goto out; + } + *dma_addr = dmaaddr; + + *size = of_read_number(ranges + naddr + pna, nsize); + + pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n", + *dma_addr, *paddr, *size); + +out: + of_node_put(node); + + return ret; +} + +static int of_bus_isa_get_dma_ranges(struct device_node *np, u64 *dma_addr, + u64 *paddr, u64 *size) +{ + return get_dma_ranges(np, dma_addr, paddr, size); +} + +static int of_bus_default_get_dma_ranges(struct device_node *np, u64 *dma_addr, + u64 *paddr, u64 *size) +{ + return get_dma_ranges(np, dma_addr, paddr, size); +} + #endif /* CONFIG_OF_ADDRESS_PCI */ #ifdef CONFIG_PCI @@ -424,6 +567,7 @@ static unsigned int of_bus_isa_get_flags(const __be32 *addr) .map = of_bus_pci_map, .translate = of_bus_pci_translate, .get_flags = of_bus_pci_get_flags, + .get_dma_ranges = of_bus_pci_get_dma_ranges, }, #endif /* CONFIG_OF_ADDRESS_PCI */ /* ISA */ @@ -435,6 +579,7 @@ static unsigned int of_bus_isa_get_flags(const __be32 *addr) .map = of_bus_isa_map, .translate = of_bus_isa_translate, .get_flags = of_bus_isa_get_flags, + .get_dma_ranges = of_bus_isa_get_dma_ranges, }, /* Default */ { @@ -445,6 +590,7 @@ static unsigned int of_bus_isa_get_flags(const __be32 *addr) .map = of_bus_default_map, .translate = of_bus_default_translate, .get_flags = of_bus_default_get_flags, + .get_dma_ranges = of_bus_default_get_dma_ranges, }, }; @@ -820,74 +966,20 @@ void __iomem *of_io_request_and_map(struct device_node *np, int index, * size : nsize cells * * It returns -ENODEV if "dma-ranges" property was not found - * for this device in DT. + * for this device in DT, except if PCI device then, dma-ranges + * can be optional property, and in that case returns size with + * entire host memory. */ int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 *size) { - struct device_node *node = of_node_get(np); - const __be32 *ranges = NULL; - int len, naddr, nsize, pna; - int ret = 0; - u64 dmaaddr; - - if (!node) - return -EINVAL; - - while (1) { - naddr = of_n_addr_cells(node); - nsize = of_n_size_cells(node); - node = of_get_next_parent(node); - if (!node) - break; - - ranges = of_get_property(node, "dma-ranges", &len); - - /* Ignore empty ranges, they imply no translation required */ - if (ranges && len > 0) - break; - - /* - * At least empty ranges has to be defined for parent node if - * DMA is supported - */ - if (!ranges) - break; - } - - if (!ranges) { - pr_debug("no dma-ranges found for node(%s)\n", np->full_name); - ret = -ENODEV; - goto out; - } - - len /= sizeof(u32); - - pna = of_n_addr_cells(node); - - /* dma-ranges format: - * DMA addr : naddr cells - * CPU addr : pna cells - * size : nsize cells - */ - dmaaddr = of_read_number(ranges, naddr); - *paddr = of_translate_dma_address(np, ranges); - if (*paddr == OF_BAD_ADDR) { - pr_err("translation of DMA address(%pad) to CPU address failed node(%s)\n", - dma_addr, np->full_name); - ret = -EINVAL; - goto out; - } - *dma_addr = dmaaddr; - - *size = of_read_number(ranges + naddr + pna, nsize); - - pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n", - *dma_addr, *paddr, *size); + struct of_bus *bus; -out: - of_node_put(node); + /* get bus specific dma-ranges. */ + bus = of_match_bus(np); + if (bus->get_dma_ranges) + return bus->get_dma_ranges(np, dma_addr, paddr, size); - return ret; + return 0; } EXPORT_SYMBOL_GPL(of_dma_get_range);