From patchwork Thu Aug 24 05:04:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oza Pawandeep X-Patchwork-Id: 9919035 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A774A60353 for ; Thu, 24 Aug 2017 05:05:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9AE0328B38 for ; Thu, 24 Aug 2017 05:05:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8F5E228B40; Thu, 24 Aug 2017 05:05:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_HI,RCVD_IN_SORBS_SPAM autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2464228B38 for ; Thu, 24 Aug 2017 05:05:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751258AbdHXFEl (ORCPT ); Thu, 24 Aug 2017 01:04:41 -0400 Received: from mail-wr0-f173.google.com ([209.85.128.173]:38334 "EHLO mail-wr0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751249AbdHXFEi (ORCPT ); Thu, 24 Aug 2017 01:04:38 -0400 Received: by mail-wr0-f173.google.com with SMTP id p8so6242776wrf.5 for ; Wed, 23 Aug 2017 22:04:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=HtazC3FgZSCBQoIn4qU8Nolq5AplcYcp/WWyqGmYRVU=; b=YPkjJH8ZIE7lXLeILCUZXzc+Nm/44fRvM8J7OP75L2iLmdistayb2Rzcx9+twNV4va AzLJ/9iJjZxUJWOAPOz+FbdAovgpUrtyGC+l1wRXv8nj2n6HDb/xctaoGIbR6Svqbo28 TWDCvg68pH3NMiQlf7wX33OJedqTloysyyjnA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=HtazC3FgZSCBQoIn4qU8Nolq5AplcYcp/WWyqGmYRVU=; b=hPPzgXUhcRwq/ly+ksVwNV8sqa7hxrOlfb/cUQvtMGk1Cxdfamyqw/cYz2USnGQW6g NkP8OIdy1W2oIzP20fuXmERHYJpch2dK6w2YGN/r16kbGt3U8Io9VqCNjJ3pMNZK51LL I7rbNL0JkIjpQGK/vE/lL22KtfOoNaRdqam7MBT1GGW9p5lZNPHMVKbC4oIGLaUwfZOL JUCEnw70UMiV22d1EmsGz92z+2qJRVRPyeWc3XSrtr3tJ0HI5AIQiyfZTO7Zg0+gz65g BaHVXiCSEKqNTFLqZ8igIZLGWzGiHcCUuALL42SCwLVPCoGz32RVUBMaal5yTuhTnttM Xr7A== X-Gm-Message-State: AHYfb5hlK4QY229i4rp0wB/GFm4ELlXBRq6zCmhW/ULrx+70/KD3iY8l EeFwMqu/sYvusCiA X-Received: by 10.223.195.120 with SMTP id e53mr3084321wrg.115.1503551076959; Wed, 23 Aug 2017 22:04:36 -0700 (PDT) Received: from anjanavk-OptiPlex-7010.dhcp.avagotech.net ([192.19.237.250]) by smtp.gmail.com with ESMTPSA id n67sm3602691wmi.43.2017.08.23.22.04.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 23 Aug 2017 22:04:36 -0700 (PDT) From: Oza Pawandeep To: Bjorn Helgaas , , Rob Herring , Mark Rutland , Ray Jui , Scott Branden , Jon Mason , bcm-kernel-feedback-list@broadcom.com, Oza Pawandeep , Andy Gospodarek , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Oza Pawandeep Subject: [PATCH v8 1/3] PCI: iproc: factor out ep configuration access Date: Thu, 24 Aug 2017 10:34:24 +0530 Message-Id: <1503551066-23212-2-git-send-email-oza.oza@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1503551066-23212-1-git-send-email-oza.oza@broadcom.com> References: <1503551066-23212-1-git-send-email-oza.oza@broadcom.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch factors out ep configuration access as a separate function. Signed-off-by: Oza Pawandeep diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c index c574863..61d9be6 100644 --- a/drivers/pci/host/pcie-iproc.c +++ b/drivers/pci/host/pcie-iproc.c @@ -448,6 +448,31 @@ static inline void iproc_pcie_apb_err_disable(struct pci_bus *bus, } } +static void __iomem *iproc_pcie_map_ep_cfg_reg(struct iproc_pcie *pcie, + unsigned int busno, + unsigned int slot, + unsigned int fn, + int where) +{ + u16 offset; + u32 val; + + /* EP device access */ + val = (busno << CFG_ADDR_BUS_NUM_SHIFT) | + (slot << CFG_ADDR_DEV_NUM_SHIFT) | + (fn << CFG_ADDR_FUNC_NUM_SHIFT) | + (where & CFG_ADDR_REG_NUM_MASK) | + (1 & CFG_ADDR_CFG_TYPE_MASK); + + iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_ADDR, val); + offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_DATA); + + if (iproc_pcie_reg_is_invalid(offset)) + return NULL; + + return (pcie->base + offset); +} + /** * Note access to the configuration registers are protected at the higher layer * by 'pci_lock' in drivers/pci/access.c @@ -459,7 +484,6 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct iproc_pcie *pcie, { unsigned slot = PCI_SLOT(devfn); unsigned fn = PCI_FUNC(devfn); - u32 val; u16 offset; /* root complex access */ @@ -484,18 +508,7 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct iproc_pcie *pcie, if (slot > 0) return NULL; - /* EP device access */ - val = (busno << CFG_ADDR_BUS_NUM_SHIFT) | - (slot << CFG_ADDR_DEV_NUM_SHIFT) | - (fn << CFG_ADDR_FUNC_NUM_SHIFT) | - (where & CFG_ADDR_REG_NUM_MASK) | - (1 & CFG_ADDR_CFG_TYPE_MASK); - iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_ADDR, val); - offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_DATA); - if (iproc_pcie_reg_is_invalid(offset)) - return NULL; - else - return (pcie->base + offset); + return iproc_pcie_map_ep_cfg_reg(pcie, busno, slot, fn, where); } static void __iomem *iproc_pcie_bus_map_cfg_bus(struct pci_bus *bus,