From patchwork Mon Aug 28 00:25:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 9924031 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BA92260383 for ; Mon, 28 Aug 2017 00:26:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ACE3A28633 for ; Mon, 28 Aug 2017 00:26:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A19CA2863C; Mon, 28 Aug 2017 00:26:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 43D8C28635 for ; Mon, 28 Aug 2017 00:26:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751742AbdH1A0O (ORCPT ); Sun, 27 Aug 2017 20:26:14 -0400 Received: from mail-qt0-f195.google.com ([209.85.216.195]:35013 "EHLO mail-qt0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751473AbdH1A0O (ORCPT ); Sun, 27 Aug 2017 20:26:14 -0400 Received: by mail-qt0-f195.google.com with SMTP id u11so4022236qtu.2 for ; Sun, 27 Aug 2017 17:26:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=+n2s/nZKOJ2HbSAt0QysYJdlncJ5BsNiysY25A9x4R4=; b=mZZWAIo+fnGLDN9zvtzVw/vK2DZBdym9yX4XGdmchQoj3+6UfDlpyurjaTYSeQnIGR MCdENIZ30sp5tnOrgLlXsOG3l7h4bGSz6RmbSy7dtrP5KUOzrp5sUkV433BRgD+ijDya B9EX0Ip2OQ9eawukBuXBFAokxDu/n5WSzMVxMYOD/MTp+1JRDnW8YNt+IFv5tt/MoQRv sLufELkCjsFxg9q9fz5pd0x0P+mnuiM2RO+fasJCnQjO4QpDh//hVoGfwiS8Q1QIUGPm nPWbiqbJOF7LHN6ph0pDUkHIOHNbdFlUwWaHnP1sGLAPLh+VhwteSKaYuvfMu8TfZ/9D vNBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=+n2s/nZKOJ2HbSAt0QysYJdlncJ5BsNiysY25A9x4R4=; b=CL+MVTGMcr+mCNtrFkordYSWnutCaYEI5zF8sx725STUvcTSQmPg9agCqksLe+hoza miu1XYuRclgHX3O2/Fx/LPzmlRCFj8dzKQ74Walo+aMh8gKbkbTuFGmbNBm10e7+jZkN MKArKKIxskZP4rs08Ii1e1320xn4MCywa3NnNzuOi28R6iBCRTcoh99RbJlt+92AWFJb NnHq+dH91eC/P0himEQgax7A8y6tQz32SG8vRDjHCvDQ1+js5fbpwM4gFpTNM+oTzKD9 NG/IVMFHTs1gnklhKN45np6rso80X/1VHYZIZpOdnU4bapQSVi+rnwh2rj8oY+86z74+ WhDA== X-Gm-Message-State: AHYfb5hjr0s2lDZQp+jBVE6i8f0vroPbEwpCV8/1hJ1Hp1gr6JM9sdwt q8gjYiFA5NE2FQ== X-Received: by 10.237.42.60 with SMTP id c57mr6882558qtd.266.1503879973399; Sun, 27 Aug 2017 17:26:13 -0700 (PDT) Received: from localhost.localdomain ([187.180.183.214]) by smtp.gmail.com with ESMTPSA id t36sm7324927qtd.50.2017.08.27.17.26.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 27 Aug 2017 17:26:12 -0700 (PDT) From: Fabio Estevam To: bhelgaas@google.com Cc: shawn.lin@rock-chips.com, heiko@sntech.de, linux-pci@vger.kernel.org, Fabio Estevam Subject: [PATCH RESEND] PCI: rockchip: Use gpiod_set_value_cansleep() to allow reset via expanders Date: Sun, 27 Aug 2017 21:25:57 -0300 Message-Id: <1503879957-30008-1-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 2.7.4 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The reset GPIO can be connected to a I2C or SPI IO expander, which may sleep, so it is safer to use the gpiod_set_value_cansleep() variant instead. Signed-off-by: Fabio Estevam Acked-by: Shawn Lin --- Changes since v1: - Resending with Shawn Lin added on Cc. drivers/pci/host/pcie-rockchip.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 2eccd53..124b280 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -537,7 +537,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) int err, i; u32 status; - gpiod_set_value(rockchip->ep_gpio, 0); + gpiod_set_value_cansleep(rockchip->ep_gpio, 0); err = reset_control_assert(rockchip->aclk_rst); if (err) { @@ -682,7 +682,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE, PCIE_CLIENT_CONFIG); - gpiod_set_value(rockchip->ep_gpio, 1); + gpiod_set_value_cansleep(rockchip->ep_gpio, 1); /* 500ms timeout value should be enough for Gen1/2 training */ err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1,