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Tue, 12 Sep 2017 11:55:30 +0000 From: Vadim Lomovtsev To: bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Cc: David.Daney@cavium.com, jcm@redhat.com, Robert.Richter@cavium.com, Wilson.Snyder@cavium.com, Vadim Lomovtsev Subject: [PATCH] PCI: quirks: update cavium ACS quirk implementation Date: Tue, 12 Sep 2017 04:55:16 -0700 Message-Id: <1505217316-15702-1-git-send-email-Vadim.Lomovtsev@caviumnetworks.com> X-Mailer: git-send-email 2.4.11 MIME-Version: 1.0 X-Originating-IP: [50.233.148.156] X-ClientProxiedBy: MWHPR2201CA0001.namprd22.prod.outlook.com (10.174.164.14) To CY4PR07MB2997.namprd07.prod.outlook.com (10.172.116.11) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0f37c86d-54eb-47f2-384b-08d4f9d52b10 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(300000500095)(300135000095)(300000501095)(300135300095)(300000502095)(300135100095)(22001)(2017030254152)(300000503095)(300135400095)(2017052603199)(201703131423075)(201703031133081)(201702281549075)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095); 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Match function checks for ACS support and exact ACS bits set at the device capabilities. Also by this commit we get rid off device ID range values checkings. Signed-off-by: Vadim Lomovtsev --- drivers/pci/quirks.c | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index a4d3361..11ca951 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4211,6 +4211,29 @@ static int pci_quirk_amd_sb_acs(struct pci_dev *dev, u16 acs_flags) #endif } +#define CAVIUM_ACS_FLAGS (PCI_ACS_SV | PCI_ACS_TB | PCI_ACS_RR | \ + PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_DT) + +static __inline__ bool pci_quirk_cavium_acs_match(struct pci_dev *dev) +{ + int pos = 0; + u32 caps = 0; + + /* Filter out a few obvious non-matches first */ + if (!pci_is_pcie(dev) || pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) + return false; + + /* Get the ACS caps offset */ + pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS); + if (pos) { + pci_read_config_dword(dev, pos + PCI_ACS_CAP, &caps); + /* If we have no such bits set, then we will need a quirk */ + return ((caps & CAVIUM_ACS_FLAGS) != CAVIUM_ACS_FLAGS); + } + + return true; +} + static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags) { /* @@ -4218,13 +4241,10 @@ static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags) * with other functions, allowing masking out these bits as if they * were unimplemented in the ACS capability. */ - acs_flags &= ~(PCI_ACS_SV | PCI_ACS_TB | PCI_ACS_RR | - PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_DT); - - if (!((dev->device >= 0xa000) && (dev->device <= 0xa0ff))) + if (!pci_quirk_cavium_acs_match(dev)) return -ENOTTY; - return acs_flags ? 0 : 1; + return acs_flags & ~(CAVIUM_ACS_FLAGS) ? 0 : 1; } static int pci_quirk_xgene_acs(struct pci_dev *dev, u16 acs_flags)