From patchwork Fri Nov 3 13:52:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 10040219 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 44A466032D for ; Fri, 3 Nov 2017 13:53:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3581F29642 for ; Fri, 3 Nov 2017 13:53:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2A3AB2964E; Fri, 3 Nov 2017 13:53:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E411029642 for ; Fri, 3 Nov 2017 13:53:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756403AbdKCNwu (ORCPT ); Fri, 3 Nov 2017 09:52:50 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:56799 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756242AbdKCNws (ORCPT ); Fri, 3 Nov 2017 09:52:48 -0400 Received: by mail-wr0-f193.google.com with SMTP id r79so2556088wrb.13; Fri, 03 Nov 2017 06:52:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=2LXTENh/C2Fpran9XCO7Qza0Jhm01V9khZzi5V/XzHk=; b=upO8XNP3XGqa8H/8H6gpubUu2I6Vq+R26E+ddMYG9zvg7VlHUC/bJm289GWZkxfWe4 prBz2D4gHUz63hGMarISnB63Nk9jEDyWXj0F1l6OkUxydCtmlOPhMpusZmjJBXRrnV2D BTq6gmlKZpGlxCi59iT/u015BPf3f7zeTEJNkHaF59mREIiTeLY8IecQMjm9ij3uWbV5 +Rk7DYg1iGoQCC/Kry42JaHK9/rmZGJNRsmBL9E+EmT+BDN4ZiSPSqNfVq9IVxOQEsJ4 W3jXADZhhiLiueqMNurUXWLze77Zg2c+dZ3PWD+1y257lwpK3ZfbHcwpZCwtOuDK7azI 6d4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=2LXTENh/C2Fpran9XCO7Qza0Jhm01V9khZzi5V/XzHk=; b=KGnQaURpRGognneBT0WbXhF2D+YEjb9tZZRHDtXYz6LcsB5LtR5p51ONbFggjiTA4l +X+Mr2zkS2P4RKb9eXdRCAC1Jh9cPu0qmwHvYZjSXYdLzGNFRyiwZ+47eMsdMtZ/3Mc4 Rm/ofv2wR4roKMe58+LVN5dXcKGwlklomnqWdFpFNvaia+oX+A2XBIicA1ovSobeSTYM bVam4A0P7s95B+RZhugHhHz5SJ83iSHx1qDOr78F4wNM4T3uem+wkXJcyHSCwyDkT6mx c7KrMJyVofGuzstISwLfJXNWDRpvHqUcp+RxC2VDtjqlCuMn0oggkSs17wXmrQZ+qd1R iqBA== X-Gm-Message-State: AMCzsaW32UGDDwqP3rg1i+kJPaWpXpctV0TW8i9hO1/t2VFfQzVgQMvy GiX5VwUQnJkooDf09NRgV4CVqQ== X-Google-Smtp-Source: ABhQp+RGYQQcoLsT7Iy3LrjAgKUZnBFQz/Wx7HWjGgKocdqCHgpQVT10wHwKjs2nvecuuaEuhrr1kw== X-Received: by 10.223.197.65 with SMTP id s1mr6065608wrf.147.1509717166959; Fri, 03 Nov 2017 06:52:46 -0700 (PDT) Received: from localhost.localdomain ([2a02:908:1251:7981:44a4:4f3c:4c8:d3f0]) by smtp.gmail.com with ESMTPSA id z17sm4109562wrb.67.2017.11.03.06.52.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 03 Nov 2017 06:52:45 -0700 (PDT) From: "=?UTF-8?q?Christian=20K=C3=B6nig?=" X-Google-Original-From: =?UTF-8?q?Christian=20K=C3=B6nig?= To: linux-pci@vger.kernel.org, dri-devel@lists.freedesktop.org, platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, helgaas@kernel.org Subject: [PATCH 1/4] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 00h-0fh) Processors Date: Fri, 3 Nov 2017 14:52:41 +0100 Message-Id: <1509717164-1946-1-git-send-email-christian.koenig@amd.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Just add the extra PCI-ID to the existing fixup. Signed-off-by: Christian König --- arch/x86/pci/fixup.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index 7b6bd76..1d2238d 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c @@ -639,7 +639,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x8c10, quirk_apple_mbp_poweroff); * configuring host bridge windows using the _PRS and _SRS methods. * * But this is rarely implemented, so we manually enable a large 64bit BAR for - * PCIe device on AMD Family 15h (Models 30h-3fh) Processors here. + * PCIe device on AMD Family 15h (Models 00h-0fh, 30h-3fh) Processors here. */ static void pci_amd_enable_64bit_bar(struct pci_dev *dev) { @@ -696,5 +696,6 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev) pci_bus_add_resource(dev->bus, res, 0); } DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x141b, pci_amd_enable_64bit_bar); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1601, pci_amd_enable_64bit_bar); #endif