@@ -44,6 +44,25 @@ struct pci_bridge_reg_behavior {
u32 w1c;
};
+void pci_bridge_emul_set_reg_behavior(struct pci_bridge_emul *bridge,
+ bool pcie, int reg, u32 val,
+ enum pci_bridge_emul_reg_behavior type)
+{
+ struct pci_bridge_reg_behavior *behavior;
+
+ if (pcie)
+ behavior = &bridge->pcie_cap_regs_behavior[reg / 4];
+ else
+ behavior = &bridge->pci_regs_behavior[reg / 4];
+
+ if (type == PCI_BRIDGE_EMUL_REG_BEHAVIOR_RO)
+ behavior->ro = val;
+ else if (type == PCI_BRIDGE_EMUL_REG_BEHAVIOR_RW)
+ behavior->rw = val;
+ else /* PCI_BRIDGE_EMUL_REG_BEHAVIOR_W1C */
+ behavior->w1c = val;
+}
+
static const struct pci_bridge_reg_behavior pci_regs_behavior[] = {
[PCI_VENDOR_ID / 4] = { .ro = ~0 },
[PCI_COMMAND / 4] = {
@@ -72,6 +72,12 @@ struct pci_bridge_emul_pcie_conf {
typedef enum { PCI_BRIDGE_EMUL_HANDLED,
PCI_BRIDGE_EMUL_NOT_HANDLED } pci_bridge_emul_read_status_t;
+enum pci_bridge_emul_reg_behavior {
+ PCI_BRIDGE_EMUL_REG_BEHAVIOR_RO,
+ PCI_BRIDGE_EMUL_REG_BEHAVIOR_RW,
+ PCI_BRIDGE_EMUL_REG_BEHAVIOR_W1C,
+};
+
struct pci_bridge_emul_ops {
/*
* Called when reading from the regular PCI bridge
@@ -132,4 +138,8 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
int size, u32 value);
+void pci_bridge_emul_set_reg_behavior(struct pci_bridge_emul *bridge,
+ bool pcie, int reg, u32 val,
+ enum pci_bridge_emul_reg_behavior type);
+
#endif /* __PCI_BRIDGE_EMUL_H__ */
Add a handler to set behavior of a PCI or PCIe register. Add the appropriate enums to specify the register's Read-Only, Read-Write, and Write-1-to-Clear behaviors. Signed-off-by: Jon Derrick <jonathan.derrick@intel.com> --- drivers/pci/pci-bridge-emul.c | 19 +++++++++++++++++++ drivers/pci/pci-bridge-emul.h | 10 ++++++++++ 2 files changed, 29 insertions(+)