| Message ID | 1591174481-13975-2-git-send-email-hayashi.kunihiko@socionext.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | PCI: uniphier: Add features for UniPhier PCIe host controller | expand |
On 2020-06-03 09:54, Kunihiko Hayashi wrote: > This adds msi_host_isr() callback function support to describe > SoC-dependent service triggered by MSI. > > For example, when AER interrupt is triggered by MSI, the callback > function > reads SoC-dependent registers and detects that the interrupt is from > AER, > and invoke AER interrupts related to MSI. > > Cc: Marc Zyngier <maz@kernel.org> > Cc: Jingoo Han <jingoohan1@gmail.com> > Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- > drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++---- > drivers/pci/controller/dwc/pcie-designware.h | 1 + > 2 files changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c > b/drivers/pci/controller/dwc/pcie-designware-host.c > index 0a4a5aa..9b628a2 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -112,13 +112,13 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port > *pp) > static void dw_chained_msi_isr(struct irq_desc *desc) > { > struct irq_chip *chip = irq_desc_get_chip(desc); > - struct pcie_port *pp; > + struct pcie_port *pp = irq_desc_get_handler_data(desc); > > - chained_irq_enter(chip, desc); > + if (pp->ops->msi_host_isr) > + pp->ops->msi_host_isr(pp); Why is this call outside of the enter/exit guards? Do you still need to execute the standard handler? > > - pp = irq_desc_get_handler_data(desc); > + chained_irq_enter(chip, desc); > dw_handle_msi_irq(pp); > - > chained_irq_exit(chip, desc); > } > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h > b/drivers/pci/controller/dwc/pcie-designware.h > index 656e00f..e741967 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -170,6 +170,7 @@ struct dw_pcie_host_ops { > void (*scan_bus)(struct pcie_port *pp); > void (*set_num_vectors)(struct pcie_port *pp); > int (*msi_host_init)(struct pcie_port *pp); > + void (*msi_host_isr)(struct pcie_port *pp); > }; > > struct pcie_port { Thanks, M.
Hi Marc, On 2020/06/03 20:15, Marc Zyngier wrote: > On 2020-06-03 09:54, Kunihiko Hayashi wrote: >> This adds msi_host_isr() callback function support to describe >> SoC-dependent service triggered by MSI. >> >> For example, when AER interrupt is triggered by MSI, the callback function >> reads SoC-dependent registers and detects that the interrupt is from AER, >> and invoke AER interrupts related to MSI. >> >> Cc: Marc Zyngier <maz@kernel.org> >> Cc: Jingoo Han <jingoohan1@gmail.com> >> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> >> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> >> --- >> drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++---- >> drivers/pci/controller/dwc/pcie-designware.h | 1 + >> 2 files changed, 5 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c >> b/drivers/pci/controller/dwc/pcie-designware-host.c >> index 0a4a5aa..9b628a2 100644 >> --- a/drivers/pci/controller/dwc/pcie-designware-host.c >> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c >> @@ -112,13 +112,13 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) >> static void dw_chained_msi_isr(struct irq_desc *desc) >> { >> struct irq_chip *chip = irq_desc_get_chip(desc); >> - struct pcie_port *pp; >> + struct pcie_port *pp = irq_desc_get_handler_data(desc); >> >> - chained_irq_enter(chip, desc); >> + if (pp->ops->msi_host_isr) >> + pp->ops->msi_host_isr(pp); > > Why is this call outside of the enter/exit guards? > Do you still need to execute the standard handler? I assume that the msi_host_isr() contains chained interrupts in the second patch and no need to treat as the standard handler, so this should be called in the guards. I'll move this call to the top of dw_chained_msi_isr(). Thank you, --- Best Regards Kunihiko Hayashi
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 0a4a5aa..9b628a2 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -112,13 +112,13 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) static void dw_chained_msi_isr(struct irq_desc *desc) { struct irq_chip *chip = irq_desc_get_chip(desc); - struct pcie_port *pp; + struct pcie_port *pp = irq_desc_get_handler_data(desc); - chained_irq_enter(chip, desc); + if (pp->ops->msi_host_isr) + pp->ops->msi_host_isr(pp); - pp = irq_desc_get_handler_data(desc); + chained_irq_enter(chip, desc); dw_handle_msi_irq(pp); - chained_irq_exit(chip, desc); } diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 656e00f..e741967 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -170,6 +170,7 @@ struct dw_pcie_host_ops { void (*scan_bus)(struct pcie_port *pp); void (*set_num_vectors)(struct pcie_port *pp); int (*msi_host_init)(struct pcie_port *pp); + void (*msi_host_isr)(struct pcie_port *pp); }; struct pcie_port {
This adds msi_host_isr() callback function support to describe SoC-dependent service triggered by MSI. For example, when AER interrupt is triggered by MSI, the callback function reads SoC-dependent registers and detects that the interrupt is from AER, and invoke AER interrupts related to MSI. Cc: Marc Zyngier <maz@kernel.org> Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++---- drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 5 insertions(+), 4 deletions(-)