Message ID | 1596795922-705-3-git-send-email-hayashi.kunihiko@socionext.com (mailing list archive) |
---|---|
State | Superseded, archived |
Delegated to: | Lorenzo Pieralisi |
Headers | show |
Series | PCI: uniphier: Add features for UniPhier PCIe host controller | expand |
On Fri, 07 Aug 2020 19:25:18 +0900, Kunihiko Hayashi wrote: > This adds msi_host_isr() callback function support to describe > SoC-dependent service triggered by MSI. > > For example, when AER interrupt is triggered by MSI, the callback function > reads SoC-dependent registers and detects that the interrupt is from AER, > and invoke AER interrupts related to MSI. > > Cc: Marc Zyngier <maz@kernel.org> > Cc: Jingoo Han <jingoohan1@gmail.com> > Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> > --- > drivers/pci/controller/dwc/pcie-designware-host.c | 3 +++ > drivers/pci/controller/dwc/pcie-designware.h | 1 + > 2 files changed, 4 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 9dafecb..7948bf1 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -83,6 +83,9 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) u32 status, num_ctrls; irqreturn_t ret = IRQ_NONE; + if (pp->ops->msi_host_isr) + pp->ops->msi_host_isr(pp); + num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; for (i = 0; i < num_ctrls; i++) { diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index f911760..401cbd9 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -170,6 +170,7 @@ struct dw_pcie_host_ops { void (*scan_bus)(struct pcie_port *pp); void (*set_num_vectors)(struct pcie_port *pp); int (*msi_host_init)(struct pcie_port *pp); + void (*msi_host_isr)(struct pcie_port *pp); }; struct pcie_port {