From patchwork Wed Feb 3 20:56:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dey, Megha" X-Patchwork-Id: 12065323 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E5DDC433E0 for ; Wed, 3 Feb 2021 20:59:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4918064F7E for ; Wed, 3 Feb 2021 20:59:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232540AbhBCU7K (ORCPT ); Wed, 3 Feb 2021 15:59:10 -0500 Received: from mga07.intel.com ([134.134.136.100]:45328 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232932AbhBCU64 (ORCPT ); Wed, 3 Feb 2021 15:58:56 -0500 IronPort-SDR: OmYE1v2p6Q4ispbK4IuHMYofFrEAg6o6dh5exzZY+GecGk+fali4j3YNiHaiJDvfoLPgVC5FQ6 FNiEY2a4pOfg== X-IronPort-AV: E=McAfee;i="6000,8403,9884"; a="245191309" X-IronPort-AV: E=Sophos;i="5.79,399,1602572400"; d="scan'208";a="245191309" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2021 12:57:31 -0800 IronPort-SDR: QZlpHv60LEgw1Tva4TVObVrye2zuMOFvuGuGwnX7Sj3M3Y5+jChKDshA8MTt8ME2eyNSHooii+ 3nLE0Ox0sqAA== X-IronPort-AV: E=Sophos;i="5.79,399,1602572400"; d="scan'208";a="372510580" Received: from megha-z97x-ud7-th.sc.intel.com ([143.183.85.154]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 03 Feb 2021 12:57:30 -0800 From: Megha Dey To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, dave.jiang@intel.com, ashok.raj@intel.com, kevin.tian@intel.com, dwmw@amazon.co.uk, x86@kernel.org, tony.luck@intel.com, dan.j.williams@intel.com, megha.dey@intel.com, jgg@mellanox.com, kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, bhelgaas@google.com, maz@kernel.org, linux-pci@vger.kernel.org, baolu.lu@linux.intel.com, ravi.v.shankar@intel.com Subject: [PATCH 09/12] iommu/vt-d: Add DEV-MSI support Date: Wed, 3 Feb 2021 12:56:42 -0800 Message-Id: <1612385805-3412-10-git-send-email-megha.dey@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1612385805-3412-1-git-send-email-megha.dey@intel.com> References: <1612385805-3412-1-git-send-email-megha.dey@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add required support in the interrupt remapping driver for devices which generate dev-msi interrupts and use the intel remapping domain as the parent domain. Set the source-id of all dev-msi interrupt requests to the parent PCI device associated with it. Reviewed-by: Tony Luck Signed-off-by: Megha Dey --- drivers/iommu/intel/irq_remapping.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/intel/irq_remapping.c b/drivers/iommu/intel/irq_remapping.c index 685200a..18f1b53 100644 --- a/drivers/iommu/intel/irq_remapping.c +++ b/drivers/iommu/intel/irq_remapping.c @@ -1278,6 +1278,9 @@ static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data, case X86_IRQ_ALLOC_TYPE_PCI_MSIX: set_msi_sid(irte, msi_desc_to_pci_dev(info->desc)); break; + case X86_IRQ_ALLOC_TYPE_DEV_MSI: + set_msi_sid(irte, to_pci_dev(info->desc->dev->parent)); + break; default: BUG_ON(1); break; @@ -1321,7 +1324,8 @@ static int intel_irq_remapping_alloc(struct irq_domain *domain, if (!info || !iommu) return -EINVAL; if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI && - info->type != X86_IRQ_ALLOC_TYPE_PCI_MSIX) + info->type != X86_IRQ_ALLOC_TYPE_PCI_MSIX && + info->type != X86_IRQ_ALLOC_TYPE_DEV_MSI) return -EINVAL; /*