From patchwork Wed Apr 14 13:20:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Peled X-Patchwork-Id: 12202771 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FC93C433B4 for ; Wed, 14 Apr 2021 13:21:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 187FE611AD for ; Wed, 14 Apr 2021 13:21:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351297AbhDNNVz (ORCPT ); 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Wed, 14 Apr 2021 06:21:21 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 14 Apr 2021 06:21:19 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 14 Apr 2021 06:21:19 -0700 Received: from nw-bp.marvell.com (nw-bp.marvell.com [10.5.24.22]) by maili.marvell.com (Postfix) with ESMTP id 6AFC53F7045; Wed, 14 Apr 2021 06:21:15 -0700 (PDT) From: To: , , CC: , , , , , , , , , , , , , , Ben Peled Subject: =?utf-8?q?=5B=E2=80=9DPATCH=E2=80=9D_v2_4/5=5D_arm64=3A_dts=3A_marv?= =?utf-8?q?ell=3A_add_pcie_mac_reset_to_pcie?= Date: Wed, 14 Apr 2021 16:20:53 +0300 Message-ID: <1618406454-7953-5-git-send-email-bpeled@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1618406454-7953-1-git-send-email-bpeled@marvell.com> References: <1618406454-7953-1-git-send-email-bpeled@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: p7_gtBD-RNQNkH_SBfi2yiwINBSNHiIV X-Proofpoint-GUID: p7_gtBD-RNQNkH_SBfi2yiwINBSNHiIV X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391,18.0.761 definitions=2021-04-14_07:2021-04-14,2021-04-14 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ben Peled Add system controller and reset bit to each pcie to enable pcie mac reset Signed-off-by: Ben Peled --- arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi index 9dcf16b..eb60e73 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi @@ -11,6 +11,7 @@ #include "armada-common.dtsi" #define CP11X_PCIEx_CONF_BASE(iface) (CP11X_PCIEx_MEM_BASE(iface) + CP11X_PCIEx_MEM_SIZE(iface)) +#define CP11X_PCIEx_MAC_RESET_BIT_MASK(n) (0x1 << 11 + ((n + 2) % 3)) / { /* @@ -513,6 +514,8 @@ num-lanes = <1>; clock-names = "core", "reg"; clocks = <&CP11X_LABEL(clk) 1 13>, <&CP11X_LABEL(clk) 1 14>; + marvell,system-controller = <&CP11X_LABEL(syscon0)>; + marvell,mac-reset-bit-mask = ; status = "disabled"; }; @@ -538,6 +541,8 @@ num-lanes = <1>; clock-names = "core", "reg"; clocks = <&CP11X_LABEL(clk) 1 11>, <&CP11X_LABEL(clk) 1 14>; + marvell,system-controller = <&CP11X_LABEL(syscon0)>; + marvell,mac-reset-bit-mask = ; status = "disabled"; }; @@ -563,6 +568,8 @@ num-lanes = <1>; clock-names = "core", "reg"; clocks = <&CP11X_LABEL(clk) 1 12>, <&CP11X_LABEL(clk) 1 14>; + marvell,system-controller = <&CP11X_LABEL(syscon0)>; + marvell,mac-reset-bit-mask = ; status = "disabled"; }; };