From patchwork Tue Feb 8 03:25:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongxing Zhu X-Patchwork-Id: 12738147 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F185C433F5 for ; Tue, 8 Feb 2022 04:06:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346686AbiBHEGH (ORCPT ); Mon, 7 Feb 2022 23:06:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40430 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345235AbiBHEGE (ORCPT ); Mon, 7 Feb 2022 23:06:04 -0500 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9ED8C0401E9; Mon, 7 Feb 2022 20:06:03 -0800 (PST) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 9CC47200667; Tue, 8 Feb 2022 04:57:02 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 63BBA2006C5; Tue, 8 Feb 2022 04:57:02 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id C9CCF183ACDE; Tue, 8 Feb 2022 11:57:00 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, broonie@kernel.org, lorenzo.pieralisi@arm.com, jingoohan1@gmail.com, festevam@gmail.com Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Subject: [PATCH v6 6/8] PCI: dwc: Add dw_pcie_host_ops.host_exit() callback Date: Tue, 8 Feb 2022 11:25:33 +0800 Message-Id: <1644290735-3797-7-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1644290735-3797-1-git-send-email-hongxing.zhu@nxp.com> References: <1644290735-3797-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org When link is never came up in the link training after host_init. The clocks and power supplies usage counter balance should be handled properly on some DWC platforms (for example, i.MX PCIe). Add a new host_exit() callback into dw_pcie_host_ops, then it could be invoked to handle the unbalance issue in the error handling after host_init() function when link is down. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pcie-designware-host.c | 5 ++++- drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index f4755f3a03be..461863bde3c9 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -405,7 +405,7 @@ int dw_pcie_host_init(struct pcie_port *pp) if (!dw_pcie_link_up(pci) && pci->ops && pci->ops->start_link) { ret = pci->ops->start_link(pci); if (ret) - goto err_free_msi; + goto err_host_init; } /* Ignore errors, the link may come up later */ @@ -417,6 +417,9 @@ int dw_pcie_host_init(struct pcie_port *pp) if (!ret) return 0; +err_host_init: + if (pp->ops->host_exit) + pp->ops->host_exit(pp); err_free_msi: if (pp->has_msi_ctrl) dw_pcie_free_msi(pp); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 7d6e9b7576be..1153687ea9a6 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -174,6 +174,7 @@ enum dw_pcie_device_mode { struct dw_pcie_host_ops { int (*host_init)(struct pcie_port *pp); + void (*host_exit)(struct pcie_port *pp); int (*msi_host_init)(struct pcie_port *pp); };