diff mbox series

[v3,05/14] arm64: dts: Add iMX8MM PCIe EP support

Message ID 1663913220-9523-6-git-send-email-hongxing.zhu@nxp.com (mailing list archive)
State Changes Requested
Headers show
Series Add iMX PCIe EP mode support | expand

Commit Message

Hongxing Zhu Sept. 23, 2022, 6:06 a.m. UTC
Add iMX8MM PCIe EP support.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

Comments

Bjorn Helgaas Sept. 23, 2022, 2:02 p.m. UTC | #1
On Fri, Sep 23, 2022 at 02:06:51PM +0800, Richard Zhu wrote:
> Add iMX8MM PCIe EP support.

Half the time this is spelled "i.MX..." and half the time it's
"iMX..."  Pick one and use it consistently.  I think "i.MX..." is
right because that's what I see on nxp.com, e.g.,
https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8-family-arm-cortex-a53-cortex-a72-virtualization-vision-3d-graphics-4k-video:i.MX8

Also applies to several subsequent patches.

Bjorn
Hongxing Zhu Sept. 26, 2022, 5:16 a.m. UTC | #2
> -----Original Message-----
> From: Bjorn Helgaas <helgaas@kernel.org>
> Sent: 2022年9月23日 22:03
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com; robh+dt@kernel.org;
> lorenzo.pieralisi@arm.com; shawnguo@kernel.org; kishon@ti.com;
> kw@linux.com; Frank Li <frank.li@nxp.com>; linux-pci@vger.kernel.org;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org; kernel@pengutronix.de; dl-linux-imx
> <linux-imx@nxp.com>
> Subject: Re: [PATCH v3 05/14] arm64: dts: Add iMX8MM PCIe EP support
> 
> On Fri, Sep 23, 2022 at 02:06:51PM +0800, Richard Zhu wrote:
> > Add iMX8MM PCIe EP support.
> 
> Half the time this is spelled "i.MX..." and half the time it's "iMX..."  Pick one
> and use it consistently.  I think "i.MX..." is right because that's what I see on
> nxp.com, e.g.,
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.n
> xp.com%2Fproducts%2Fprocessors-and-microcontrollers%2Farm-processors%
> 2Fi-mx-applications-processors%2Fi-mx-8-processors%2Fi-mx-8-family-arm-cor
> tex-a53-cortex-a72-virtualization-vision-3d-graphics-4k-video%3Ai.MX8&amp;
> data=05%7C01%7Chongxing.zhu%40nxp.com%7C5b63f4398e2745eb1f6008d
> a9d6c5282%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637995
> 385828470777%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJ
> QIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&amp
> ;sdata=ge2kbuqT1wVObayyGEBl5RQg2apn8fKEsXzZR66jz6Y%3D&amp;reserve
> d=0
> 
> Also applies to several subsequent patches.
Okay, would be changed later.
Thanks.

Best Regards
Richard Zhu

> 
> Bjorn
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index afb90f59c83c..eca7a42ac52a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1291,6 +1291,26 @@  pcie0: pcie@33800000 {
 			status = "disabled";
 		};
 
+		pcie0_ep: pcie_ep@33800000 {
+			compatible = "fsl,imx8mm-pcie-ep";
+			reg = <0x33800000 0x400000>,
+			      <0x18000000 0x8000000>;
+			reg-names = "regs", "addr_space";
+			num-lanes = <1>;
+			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "dma";
+			fsl,max-link-speed = <2>;
+			power-domains = <&pgc_pcie>;
+			resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
+				 <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
+			reset-names = "apps", "turnoff";
+			phys = <&pcie_phy>;
+			phy-names = "pcie-phy";
+			num-ib-windows = <4>;
+			num-ob-windows = <4>;
+			status = "disabled";
+		};
+
 		gpu_3d: gpu@38000000 {
 			compatible = "vivante,gc";
 			reg = <0x38000000 0x8000>;