diff mbox series

[v1,2/4] dts: arm64: imx8mq: Add dbi2 and atu reg for i.MX8MQ PCIe EP

Message ID 1721634979-1726-3-git-send-email-hongxing.zhu@nxp.com (mailing list archive)
State Superseded
Delegated to: Krzysztof WilczyƄski
Headers show
Series Add dbi2 and atu for i.MX8M PCIe EP | expand

Commit Message

Hongxing Zhu July 22, 2024, 7:56 a.m. UTC
Add dbi2 and iatu reg for i.MX8MQ PCIe EP.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index e03186bbc415..4f0fe69ef601 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1819,9 +1819,11 @@  pcie1: pcie@33c00000 {
 
 		pcie1_ep: pcie-ep@33c00000 {
 			compatible = "fsl,imx8mq-pcie-ep";
-			reg = <0x33c00000 0x000400000>,
-			      <0x20000000 0x08000000>;
-			reg-names = "dbi", "addr_space";
+			reg = <0x33c00000 0x100000>,
+			      <0x33d00000 0x100000>,
+			      <0x33f00000 0x100000>,
+			      <0x20000000 0x8000000>;
+			reg-names = "dbi", "dbi2", "atu", "addr_space";
 			num-lanes = <1>;
 			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "dma";