From patchwork Wed Jun 10 19:56:32 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Morton X-Patchwork-Id: 29389 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n5AJvd4o003381 for ; Wed, 10 Jun 2009 19:57:45 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1761571AbZFJT4f (ORCPT ); Wed, 10 Jun 2009 15:56:35 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1761605AbZFJT4f (ORCPT ); Wed, 10 Jun 2009 15:56:35 -0400 Received: from smtp1.linux-foundation.org ([140.211.169.13]:43897 "EHLO smtp1.linux-foundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761422AbZFJT4e (ORCPT ); Wed, 10 Jun 2009 15:56:34 -0400 Received: from imap1.linux-foundation.org (imap1.linux-foundation.org [140.211.169.55]) by smtp1.linux-foundation.org (8.14.2/8.13.5/Debian-3ubuntu1.1) with ESMTP id n5AJuX6n031409 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 10 Jun 2009 12:56:34 -0700 Received: from localhost.localdomain (localhost [127.0.0.1]) by imap1.linux-foundation.org (8.13.5.20060308/8.13.5/Debian-3ubuntu1.1) with ESMTP id n5AJuXtJ009522; Wed, 10 Jun 2009 12:56:33 -0700 Message-Id: <200906101956.n5AJuXtJ009522@imap1.linux-foundation.org> Subject: [patch 4/4] pci pm: follow PCI_PM_CTRL_NO_SOFT_RESET during transitions from D3 To: jbarnes@virtuousgeek.org Cc: linux-pci@vger.kernel.org, akpm@linux-foundation.org, rjw@sisk.pl From: akpm@linux-foundation.org Date: Wed, 10 Jun 2009 12:56:32 -0700 X-Spam-Status: No, hits=-3.502 required=5 tests=AWL, BAYES_00, OSDL_HEADER_SUBJECT_BRACKETED X-Spam-Checker-Version: SpamAssassin 3.2.4-osdl_revision__1.47__ X-MIMEDefang-Filter: lf$Revision: 1.188 $ X-Scanned-By: MIMEDefang 2.63 on 140.211.169.13 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Rafael J. Wysocki According to the PCI PM specification (PCI Bus Power Management Interface Specification, Rev. 1.2, Section 5.4.1) we are supposed to reinitialize devices that have PCI_PM_CTRL_NO_SOFT_RESET clear during all transitions from PCI_D3hot to PCI_D0, but we only do it if the device's current_state field is equal to PCI_UNKNOWN. This may lead to problems if a device with PCI_PM_CTRL_NO_SOFT_RESET unset is put into PCI_D3hot at run time by its driver and pci_set_power_state() is used to put it back into PCI_D0, because in that case the device will remain uninitialized after pci_set_power_state() has returned. Prevent that from happening by modifying pci_raw_set_power_state() to reinitialize devices with PCI_PM_CTRL_NO_SOFT_RESET unset during all transitions from D3 to D0. Signed-off-by: Rafael J. Wysocki Cc: Jesse Barnes Signed-off-by: Andrew Morton --- drivers/pci/pci.c | 2 ++ 1 file changed, 2 insertions(+) diff -puN drivers/pci/pci.c~pci-pm-follow-pci_pm_ctrl_no_soft_reset-during-transitions-from-d3 drivers/pci/pci.c --- a/drivers/pci/pci.c~pci-pm-follow-pci_pm_ctrl_no_soft_reset-during-transitions-from-d3 +++ a/drivers/pci/pci.c @@ -485,6 +485,8 @@ static int pci_raw_set_power_state(struc pmcsr &= ~PCI_PM_CTRL_STATE_MASK; pmcsr |= state; break; + case PCI_D3hot: + case PCI_D3cold: case PCI_UNKNOWN: /* Boot-up */ if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot && !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET))