From patchwork Mon Apr 22 23:10:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 2474821 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 07FC63FD40 for ; Mon, 22 Apr 2013 23:10:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753578Ab3DVXK4 (ORCPT ); Mon, 22 Apr 2013 19:10:56 -0400 Received: from mail-ie0-f180.google.com ([209.85.223.180]:63414 "EHLO mail-ie0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753742Ab3DVXKz (ORCPT ); Mon, 22 Apr 2013 19:10:55 -0400 Received: by mail-ie0-f180.google.com with SMTP id to1so11108ieb.39 for ; Mon, 22 Apr 2013 16:10:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=+hhgbU/0KwSkI7qfmyVOrPvdUTcN8Rmw9kPaIYLAeJM=; b=FAM9FweT80MDbh2Zwqb+hbWK1cOJWV4Tb49vhBvi/1tg6sHgYi9LR+LFqnR4syrunD s5Z5V5DAj3XntoK+kImAW3GdWlWH2AVKPzUegLi8w/v1nNOYXdl4gEOzadoL6yFDgS9y uvcffGYG4THDh9zWzUd5DU7+Ef7YMg5Cp/O/8xulRIDvTo6YBvwH4VlWl4cjMdgAhh9R 3nC8qLl0afq23ImTAcT/DfWzW3F3cWY5N5Vp/lsQ3MJG7NINGfGUdoD5sRQKUgi/V96+ OccLfA1StiJt+U9qq3sqSjLUw3jcIKvs1W2dtf+/xSFx8+eiTvPGcS7euGL+vR/AFZIs yzgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding:x-gm-message-state; bh=+hhgbU/0KwSkI7qfmyVOrPvdUTcN8Rmw9kPaIYLAeJM=; b=MJSRJ0t0PJVwU/DqpUPbRQBzH/t6pcqC/3dGjU7HlHi1jjWVKBoxd4k+1FI+eae7hh 5SQff2b/wt1lVTwqJeqNdYeKd81OJiNxPcvrthpo4O/uayE1DSdPDwGNqdm73FLoJ2X8 gOERe2epg/vkPhXwXjZ+xwCnq6UOt56oi+tmPHDr4udJtP0Y2z64Hpv9a+/5CJBAt8ZT L1mcrsaSYW4g3CFARrMLOwj6Reg2ueWxqky/iV2D7CxjELdf7GiqK8rawG0u2JFKneN4 q+AVor1Ng+PXsGCc8VTCZ4OxLjQAffAPEjZ2tkqt746xNYBv0VMgAlR135eRf6M5ARIx fqYw== X-Received: by 10.50.154.4 with SMTP id vk4mr9104693igb.29.1366672255386; Mon, 22 Apr 2013 16:10:55 -0700 (PDT) Received: from localhost ([172.29.120.215]) by mx.google.com with ESMTPS id xd4sm19712618igb.3.2013.04.22.16.10.54 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 22 Apr 2013 16:10:54 -0700 (PDT) Subject: [PATCH v4 06/22] PCI: Use cached MSI-X cap while enabling MSI-X To: linux-pci@vger.kernel.org From: Bjorn Helgaas Cc: Gavin Shan Date: Mon, 22 Apr 2013 17:10:53 -0600 Message-ID: <20130422231053.32621.21415.stgit@bhelgaas-glaptop> In-Reply-To: <20130422230012.32621.15224.stgit@bhelgaas-glaptop> References: <20130422230012.32621.15224.stgit@bhelgaas-glaptop> User-Agent: StGit/0.15 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQmNTCQVN2WP8m8Bb6ACu4qSejEUwmG4jTkYO7VAJmZolX9lxCcCUdf1zMjDj6UVNaGImKHLjW3GqA916xAfECJMkFdXkymdhNiGUxCfVnDHskoOzvjZB5PkA8gqlZPZRWLLUS6FA6FZu/0TVqmh06iMgirH0uv3PIYrhQzt4q096vdd4Pj3x2s8W3gGO68VSgn3Sr17diQuuZoB1aTW6BJLIssArIHbAtHu3EvXfc8xXyqFNnw= Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Gavin Shan The patch uses the cached MSI-X capability offset in pci_dev instead of reading it from config space when enabling MSI-X interrupts. Signed-off-by: Gavin Shan Signed-off-by: Bjorn Helgaas --- drivers/pci/msi.c | 36 ++++++++++++++++-------------------- 1 file changed, 16 insertions(+), 20 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 0138550..79d9d04 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -598,14 +598,14 @@ static int msi_capability_init(struct pci_dev *dev, int nvec) return 0; } -static void __iomem *msix_map_region(struct pci_dev *dev, unsigned pos, - unsigned nr_entries) +static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries) { resource_size_t phys_addr; u32 table_offset; u8 bir; - pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset); + pci_read_config_dword(dev, + msix_table_offset_reg(dev->msix_cap), &table_offset); bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK); table_offset &= ~PCI_MSIX_FLAGS_BIRMASK; phys_addr = pci_resource_start(dev, bir) + table_offset; @@ -613,9 +613,8 @@ static void __iomem *msix_map_region(struct pci_dev *dev, unsigned pos, return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE); } -static int msix_setup_entries(struct pci_dev *dev, unsigned pos, - void __iomem *base, struct msix_entry *entries, - int nvec) +static int msix_setup_entries(struct pci_dev *dev, void __iomem *base, + struct msix_entry *entries, int nvec) { struct msi_desc *entry; int i; @@ -635,7 +634,7 @@ static int msix_setup_entries(struct pci_dev *dev, unsigned pos, entry->msi_attrib.is_64 = 1; entry->msi_attrib.entry_nr = entries[i].entry; entry->msi_attrib.default_irq = dev->irq; - entry->msi_attrib.pos = pos; + entry->msi_attrib.pos = dev->msix_cap; entry->mask_base = base; list_add_tail(&entry->list, &dev->msi_list); @@ -645,7 +644,7 @@ static int msix_setup_entries(struct pci_dev *dev, unsigned pos, } static void msix_program_entries(struct pci_dev *dev, - struct msix_entry *entries) + struct msix_entry *entries) { struct msi_desc *entry; int i = 0; @@ -675,23 +674,22 @@ static void msix_program_entries(struct pci_dev *dev, static int msix_capability_init(struct pci_dev *dev, struct msix_entry *entries, int nvec) { - int pos, ret; + int ret; u16 control; void __iomem *base; - pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); - pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); + pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control); /* Ensure MSI-X is disabled while it is set up */ control &= ~PCI_MSIX_FLAGS_ENABLE; - pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); + pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control); /* Request & Map MSI-X table region */ - base = msix_map_region(dev, pos, multi_msix_capable(control)); + base = msix_map_region(dev, multi_msix_capable(control)); if (!base) return -ENOMEM; - ret = msix_setup_entries(dev, pos, base, entries, nvec); + ret = msix_setup_entries(dev, base, entries, nvec); if (ret) return ret; @@ -705,7 +703,7 @@ static int msix_capability_init(struct pci_dev *dev, * interrupts coming in before they're fully set up. */ control |= PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE; - pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); + pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control); msix_program_entries(dev, entries); @@ -720,7 +718,7 @@ static int msix_capability_init(struct pci_dev *dev, dev->msix_enabled = 1; control &= ~PCI_MSIX_FLAGS_MASKALL; - pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); + pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control); return 0; @@ -906,14 +904,12 @@ EXPORT_SYMBOL(pci_disable_msi); */ int pci_msix_table_size(struct pci_dev *dev) { - int pos; u16 control; - pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); - if (!pos) + if (!dev->msix_cap) return 0; - pci_read_config_word(dev, msi_control_reg(pos), &control); + pci_read_config_word(dev, msi_control_reg(dev->msix_cap), &control); return multi_msix_capable(control); }