From patchwork Thu Sep 1 16:45:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 9309459 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9CE11607D2 for ; Thu, 1 Sep 2016 16:45:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 09B22294C8 for ; Thu, 1 Sep 2016 16:45:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F2C5B294C9; Thu, 1 Sep 2016 16:45:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 93F14294C5 for ; Thu, 1 Sep 2016 16:45:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935004AbcIAQp0 (ORCPT ); Thu, 1 Sep 2016 12:45:26 -0400 Received: from mail.kernel.org ([198.145.29.136]:57138 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755443AbcIAQpL (ORCPT ); Thu, 1 Sep 2016 12:45:11 -0400 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2ABE020375; Thu, 1 Sep 2016 16:45:10 +0000 (UTC) Received: from localhost (unknown [69.71.1.1]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 166042035D; Thu, 1 Sep 2016 16:45:09 +0000 (UTC) Subject: [PATCH 9/9] Move msleeps to address Guenter's comments. To: Shawn Lin From: Bjorn Helgaas Cc: devicetree@vger.kernel.org, Wenrui Li , Heiko Stuebner , Arnd Bergmann , Marc Zyngier , linux-pci@vger.kernel.org, Brian Norris , linux-kernel@vger.kernel.org, Doug Anderson , linux-rockchip@lists.infradead.org, Rob Herring , Guenter Roeck Date: Thu, 01 Sep 2016 11:45:07 -0500 Message-ID: <20160901164507.14195.29844.stgit@bhelgaas-glaptop2.roam.corp.google.com> In-Reply-To: <20160901163758.14195.15725.stgit@bhelgaas-glaptop2.roam.corp.google.com> References: <20160901163758.14195.15725.stgit@bhelgaas-glaptop2.roam.corp.google.com> User-Agent: StGit/0.16 MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP --- drivers/pci/host/pcie-rockchip.c | 34 +++++++--------------------------- 1 file changed, 7 insertions(+), 27 deletions(-) --- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 61b0630..6623598 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -476,23 +476,12 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) break; } - msleep(20); - - if (!time_before(jiffies, timeout)) { - err = -ETIMEDOUT; - break; - } - } - - /* Double check gen1 training */ - if (err) { - status = rockchip_pcie_read(rockchip, PCIE_CLIENT_BASIC_STATUS1); - err = ((status & PCIE_CLIENT_LINK_STATUS_MASK) == - PCIE_CLIENT_LINK_STATUS_UP) ? 0 : -ETIMEDOUT; - if (err) { + if (time_after(jiffies, timeout)) { dev_err(dev, "PCIe link training gen1 timeout!\n"); - return err; + return -ETIMEDOUT; } + + msleep(20); } /* @@ -514,21 +503,12 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) break; } - msleep(20); - - if (!time_before(jiffies, timeout)) { - err = -ETIMEDOUT; + if (time_after(jiffies, timeout)) { + dev_dbg(dev, "PCIe link training gen2 timeout, fall back to gen1!\n"); break; } - } - /* Double check gen2 training */ - if (err) { - status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL_MGMT_BASE); - err = ((status & PCIE_CORE_PL_CONF_SPEED_MASK) == - PCIE_CORE_PL_CONF_SPEED_5G) ? 0 : -ETIMEDOUT; - if (err) - dev_dbg(dev, "PCIe link training gen2 timeout, fall back to gen1!\n"); + msleep(20); } /* Check the final link width from negotiated lane counter from MGMT */