From patchwork Wed Feb 8 08:46:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 9562007 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 79734601E5 for ; Wed, 8 Feb 2017 08:50:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6C32E28495 for ; Wed, 8 Feb 2017 08:50:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6124F2849C; Wed, 8 Feb 2017 08:50:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CCEBD28495 for ; Wed, 8 Feb 2017 08:50:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932392AbdBHIsX (ORCPT ); Wed, 8 Feb 2017 03:48:23 -0500 Received: from mail-pg0-f67.google.com ([74.125.83.67]:34460 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932092AbdBHIqz (ORCPT ); Wed, 8 Feb 2017 03:46:55 -0500 Received: by mail-pg0-f67.google.com with SMTP id v184so14598182pgv.1 for ; Wed, 08 Feb 2017 00:46:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=TRfHeSUUN867VdEB5kVwL35E+AoX/eWLnOwSNq2qK+U=; b=DWdSmLGa8GdHGiVuWjVZ4ZHkL3O1x+hYBjn1vBIfD5B/FFK5gwSWFyc6RvE+RAbcK+ F20Gu+VPwkfgmenai9HHheZ0YvJ7Op7juB4OZdZY+L2sdh51HQ/feC6ZIFT3iB+EZnZs LPIzgpGHSMtHR9g46x8uns6r5YoG/yk9T7+rJPoFfwF3Q+4gaGqHcF0wOE4IIQ6fKp67 UMHrOFYFRububEtwFSRP0OQvL4pfS+YCsmWOm//1i7R+CINlCt199BXAlpyERqvJaqNn PhnG7qVPecRYTR+IogTbG12FhsBsf/9ArG+WZyyTlLBu2aJAGB7akayxDhzLMjdM5emY Pe1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:from:to:cc:subject:message-id :references:mime-version:content-disposition:in-reply-to:user-agent; bh=TRfHeSUUN867VdEB5kVwL35E+AoX/eWLnOwSNq2qK+U=; b=HpZNF+9QAfdTs42nn6nGSh2w2Q7nzlS8IPvkDY6AIV4AJj3It00Imllq/QwJgrIzVV LAuMeHXKOXisSFD/naTapqGGQ5L48grc/1q04yFlfQF5AGHTf/xCSkT3MO6CVZ3kje0v CZykvPM3TsSe7C97HtOKQXlHaPDLa7IVCb9y6WlSxO38ekDRNniss+2kN7t3IFeSqCj7 HujaMVAboVZ3l1NmB47fWeC7ftqlD6v+1DEajCada1mChoe0tB9Khlb6ydN4nA/zPsJ8 4VG0y8O3Tl6TFT74Sjw0nXQyW+mRXNHhOCwfU7LxnAhlmKqJBpjiAq1e8CQ6zF3yGgy1 FJJA== X-Gm-Message-State: AIkVDXKKV4hSvM9R8d/9QIKXPZgRyjdLqSVraScf1L8eT+S4sIk2nTvAQuWg8QhNrmH79Q== X-Received: by 10.98.3.3 with SMTP id 3mr24848465pfd.95.1486543589156; Wed, 08 Feb 2017 00:46:29 -0800 (PST) Received: from linux-siqj.site (c-69-181-250-163.hsd1.ca.comcast.net. [69.181.250.163]) by smtp.gmail.com with ESMTPSA id z77sm17866792pfk.47.2017.02.08.00.46.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 08 Feb 2017 00:46:28 -0800 (PST) Date: Wed, 8 Feb 2017 00:46:26 -0800 From: Yinghai Lu To: Lukas Wunner Cc: Bjorn Helgaas , "linux-pci@vger.kernel.org" , "Rafael J. Wysocki" , Mika Westerberg Subject: Re: pciehp is broken from 4.10-rc1 Message-ID: <20170208084624.GA13086@linux-siqj.site> References: <20170204081254.GA29595@wunner.de> <20170204185607.GA29957@wunner.de> <20170204233443.GA234@wunner.de> <20170205073454.GA253@wunner.de> <20170206204249.GA679@wunner.de> <20170207060811.GA791@wunner.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Tue, Feb 07, 2017 at 10:08:13AM -0800, Yinghai Lu wrote: > On Mon, Feb 6, 2017 at 10:08 PM, Lukas Wunner wrote: > > Please retry with a stock v4.10-rc7 kernel and report back if the issue > > persists. > > sca05-0a81fd7f:~ # echo 1 > /sys/bus/pci/slots/7/power > [ 470.356464] pciehp 0000:73:00.0:pcie004: pciehp_get_power_status: > SLOTCTRL a8 value read 17f1 > [ 470.366662] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0010 > from Slot Status > [ 470.375339] pciehp 0000:73:00.0:pcie004: pciehp_power_on_slot: > SLOTCTRL a8 write cmd 0 > [ 470.384199] pciehp 0000:73:00.0:pcie004: __pciehp_link_set: lnk_ctrl = 40 > [ 470.391789] pciehp 0000:73:00.0:pcie004: pciehp_green_led_blink: > SLOTCTRL a8 write cmd 200 > [ 470.391966] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0010 > from Slot Status > [ 470.428791] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0010 > from Slot Status > [ 472.428147] pciehp 0000:73:00.0:pcie004: Data Link Layer Link > Active not set in 1000 msec > [ 473.944158] pci 0000:74:00.0 id reading try 50 times with interval > 20 ms to get ffffffff > [ 473.953209] pciehp 0000:73:00.0:pcie004: pciehp_check_link_status: > lnk_status = 5001 > [ 473.961861] pciehp 0000:73:00.0:pcie004: link training error: status 0x5001 > [ 473.969642] pciehp 0000:73:00.0:pcie004: Failed to check link status > [ 473.970721] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0010 > from Slot Status > [ 473.970818] pciehp 0000:73:00.0:pcie004: pciehp_power_off_slot: > SLOTCTRL a8 write cmd 400 > [ 475.000272] pciehp 0000:73:00.0:pcie004: pciehp_green_led_off: > SLOTCTRL a8 write cmd 300 > [ 475.000880] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0010 > from Slot Status > [ 475.017879] pciehp 0000:73:00.0:pcie004: > pciehp_set_attention_status: SLOTCTRL a8 write cmd 40 > [ 475.018386] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0010 > from Slot Status > -bash: echo: write error: Operation not permitted Following change could make it work: --- drivers/pci/hotplug/pciehp_ctrl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) after that change will get: sca05-0a81fd7f:~ # echo 1 > /sys/bus/pci/slots/7/power [ 300.949937] pci_hotplug: power_write_file: power = 1 [ 300.955502] pciehp 0000:73:00.0:pcie004: pciehp_get_power_status: SLOTCTRL a8 value read 17f1 [ 300.982557] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0010 from Slot Status [ 300.991171] pciehp 0000:73:00.0:pcie004: pciehp_power_on_slot: SLOTCTRL a8 write cmd 0 [ 301.000033] pciehp 0000:73:00.0:pcie004: pciehp_green_led_blink: SLOTCTRL a8 write cmd 200 [ 301.009274] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0010 from Slot Status [ 301.662172] pciehp 0000:73:00.0:pcie004: pciehp_check_link_active: lnk_status = f083 [ 301.670827] pciehp 0000:73:00.0:pcie004: pending interrupts 0x0108 from Slot Status [ 301.679376] pciehp 0000:73:00.0:pcie004: Slot(7): Link Up [ 301.685463] pciehp 0000:73:00.0:pcie004: Slot(7): Link Up event ignored; already powering on [ 301.685508] pciehp 0000:73:00.0:pcie004: pciehp_check_link_active: lnk_status = f083 [ 302.005967] pciehp 0000:73:00.0:pcie004: pciehp_check_link_status: lnk_status = f083 [ 302.014859] pci 0000:74:00.0: [15b3:1003] type 00 class 0x0c0600 ... that means in commit 68db9bc8 changelog about power on does not need D0 ----- Even turning on slot power doesn't seem to require the port to be in D0, at least the PCIe spec doesn't say so and I confirmed that by testing with a Thunderbolt controller. ----- may not stand on this silicon. Thanks Yinghai Index: linux-2.6/drivers/pci/hotplug/pciehp_ctrl.c =================================================================== --- linux-2.6.orig/drivers/pci/hotplug/pciehp_ctrl.c +++ linux-2.6/drivers/pci/hotplug/pciehp_ctrl.c @@ -89,17 +89,17 @@ static int board_added(struct slot *p_sl struct controller *ctrl = p_slot->ctrl; struct pci_bus *parent = ctrl->pcie->port->subordinate; + pm_runtime_get_sync(&ctrl->pcie->port->dev); if (POWER_CTRL(ctrl)) { /* Power on slot */ retval = pciehp_power_on_slot(p_slot); if (retval) - return retval; + goto err_exit; } pciehp_green_led_blink(p_slot); /* Check link training status */ - pm_runtime_get_sync(&ctrl->pcie->port->dev); retval = pciehp_check_link_status(ctrl); if (retval) { ctrl_err(ctrl, "Failed to check link status\n");