From patchwork Thu Mar 2 23:21:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andi Kleen X-Patchwork-Id: 9601947 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3BC066016C for ; Fri, 3 Mar 2017 02:05:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2A1BE285EC for ; Fri, 3 Mar 2017 02:05:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1D5CA285EF; Fri, 3 Mar 2017 02:05:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A6BD7285EC for ; Fri, 3 Mar 2017 02:05:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751737AbdCCCFu (ORCPT ); Thu, 2 Mar 2017 21:05:50 -0500 Received: from mga11.intel.com ([192.55.52.93]:17022 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751683AbdCCCFt (ORCPT ); Thu, 2 Mar 2017 21:05:49 -0500 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Mar 2017 15:21:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,233,1484035200"; d="scan'208";a="940008021" Received: from tassilo.jf.intel.com (HELO tassilo.localdomain) ([10.7.201.35]) by orsmga003.jf.intel.com with ESMTP; 02 Mar 2017 15:21:11 -0800 Received: by tassilo.localdomain (Postfix, from userid 1000) id 720A7300B73; Thu, 2 Mar 2017 15:21:11 -0800 (PST) From: Andi Kleen To: bhelgaas@google.com Cc: x86@kernel.org, linux-pci@vger.kernel.org, eranian@google.com, peterz@infradead.org, linux-kernel@vger.kernel.org, Andi Kleen Subject: [PATCH 4/4] perf/x86/intel/uncore: Enable forced mmconfig for Intel uncore Date: Thu, 2 Mar 2017 15:21:04 -0800 Message-Id: <20170302232104.10136-4-andi@firstfloor.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170302232104.10136-1-andi@firstfloor.org> References: <20170302232104.10136-1-andi@firstfloor.org> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Andi Kleen On Intel systems some uncore counters are located in PCI config space. On 4S systems with many uncore events being sampled at a high frequency we can see significant overhead from the type 1 accesses: both from the IO port accesses and also from lock contention on the locks protection the IO port. This patch uses the pci_bus_force_mmconfig() interface earlier to force lockless MMCONFIG for the bus the uncore devices are residing on, which significantly lowers overhead. These busses only contain Intel on chip devices which support mmconfig. Signed-off-by: Andi Kleen --- arch/x86/events/intel/uncore.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index 758c1aa5009d..4cc2ee3d0165 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -875,6 +875,12 @@ static int uncore_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id struct intel_uncore_box *box; int phys_id, pkg, ret; + /* + * Force MMCONFIG for all accesses, as we can otherwise + * have significant lock contention on the type1 IO port spinlock. + */ + pci_bus_force_mmconfig(pdev->bus); + phys_id = uncore_pcibus_to_physid(pdev->bus); if (phys_id < 0) return -ENODEV;