| Message ID | 20170313142259.25397-16-kishon@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
On Mon, Mar 13, 2017 at 07:52:51PM +0530, Kishon Vijay Abraham I wrote: > Update device tree binding documentation of TI's dra7xx PCI > controller to include property for enabling unaligned mem access. > > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > Documentation/devicetree/bindings/pci/ti-pci.txt | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt > index 190828a5f32a..b69dd7dbd29e 100644 > --- a/Documentation/devicetree/bindings/pci/ti-pci.txt > +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt > @@ -39,6 +39,11 @@ DEVICE MODE > - interrupts : one interrupt entries must be specified for main interrupt. > - num-ib-windows : number of inbound address translation windows > - num-ob-windows : number of outbound address translation windows > + - ti,syscon-unaligned-access: phandle to the syscon dt node. The 1st argument > + should contain the register offset within syscon > + and the 2nd argument should contain the bit field > + for setting the bit to enable unaligned > + access. This should be setup by the firmware/bootloader or some platform code. Why does the PCI host need to configure this? Rob
Hi Rob, On Tuesday 21 March 2017 03:13 AM, Rob Herring wrote: > On Mon, Mar 13, 2017 at 07:52:51PM +0530, Kishon Vijay Abraham I wrote: >> Update device tree binding documentation of TI's dra7xx PCI >> controller to include property for enabling unaligned mem access. >> >> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >> --- >> Documentation/devicetree/bindings/pci/ti-pci.txt | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt >> index 190828a5f32a..b69dd7dbd29e 100644 >> --- a/Documentation/devicetree/bindings/pci/ti-pci.txt >> +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt >> @@ -39,6 +39,11 @@ DEVICE MODE >> - interrupts : one interrupt entries must be specified for main interrupt. >> - num-ib-windows : number of inbound address translation windows >> - num-ob-windows : number of outbound address translation windows >> + - ti,syscon-unaligned-access: phandle to the syscon dt node. The 1st argument >> + should contain the register offset within syscon >> + and the 2nd argument should contain the bit field >> + for setting the bit to enable unaligned >> + access. > > This should be setup by the firmware/bootloader or some platform code. > Why does the PCI host need to configure this? That would create a dependency between the bootloader and kernel which is usually avoided in platforms like dra7xx. Thanks Kishon
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt index 190828a5f32a..b69dd7dbd29e 100644 --- a/Documentation/devicetree/bindings/pci/ti-pci.txt +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt @@ -39,6 +39,11 @@ DEVICE MODE - interrupts : one interrupt entries must be specified for main interrupt. - num-ib-windows : number of inbound address translation windows - num-ob-windows : number of outbound address translation windows + - ti,syscon-unaligned-access: phandle to the syscon dt node. The 1st argument + should contain the register offset within syscon + and the 2nd argument should contain the bit field + for setting the bit to enable unaligned + access. Optional Property: - gpios : Should be added if a gpio line is required to drive PERST# line
Update device tree binding documentation of TI's dra7xx PCI controller to include property for enabling unaligned mem access. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- Documentation/devicetree/bindings/pci/ti-pci.txt | 5 +++++ 1 file changed, 5 insertions(+)