From patchwork Tue Mar 14 15:18:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 9623703 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1B0BC604CC for ; Tue, 14 Mar 2017 15:19:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0E376285A0 for ; Tue, 14 Mar 2017 15:19:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 01C99285A5; Tue, 14 Mar 2017 15:19:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7CE98285A0 for ; Tue, 14 Mar 2017 15:19:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751628AbdCNPSu (ORCPT ); Tue, 14 Mar 2017 11:18:50 -0400 Received: from mail-pg0-f66.google.com ([74.125.83.66]:36429 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751159AbdCNPSp (ORCPT ); Tue, 14 Mar 2017 11:18:45 -0400 Received: by mail-pg0-f66.google.com with SMTP id m5so749231pgk.3; Tue, 14 Mar 2017 08:18:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ePbiKF2W6kKNRTxuHnnP6+bHK+6aH9P08o/whfSMWgU=; b=rdqDPXXyBDWVBbIBZNwoay1WM3GXckEQGaqVj0dRenBD72fYoT9VbVCZXdDkTc1ms1 s4AHbJihS9wbfnCeYmEkCgOJJV7NW6SB299GYH2j868ac+VTTotUuKqNY908SxN0W+op 7cC7LxoieNI/NPOZ2m6YMna10JhX5OtvNa3ebXk/70PtAxKphz2/yz8LvovfU/Ao1QYA 8QEjI4j9eHmDmjUBtKCJAAs5OK+xqv6t7g45Qu+3r9WU3nuztw51BnNL7OYNpkkFBGRk viSW7hSKB72X+2ss+Ac65qoy9hzcRN5bsGGr0xAXVwusL9qkgcxlrR7Z4vZ4Kg7SM8tV Xyvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ePbiKF2W6kKNRTxuHnnP6+bHK+6aH9P08o/whfSMWgU=; b=rGgxETG/1d+OHH3+cMcY+J6yHXhGWJ9pfxVCgIEv3ifnwGOntc1lAOoz1N0MROduht p1BsAP2qCMOcASsa19SjFNNZMYTp+rIqzmmRUM+lkFTwQJ4HfKz6IkJDMQWBLV3sCZyW hqgrOmVs0BrXzlc6fg54aL5/1is1CNjZa+i+Mri95TSOt5jOeBT0vV5VN3a/iMlcMPQd Ef2QeT4QH7UhllpTwKjPsT6b11/XWeqObJowd7OScIejcslz7Aqyu3GJCm+wICU8yeA4 jzeN0oE9I4scQ1ZvZz2SveGq/tFPcy9L/trhLVJ38gwe6t6j2oyXD8aGTlMczAXlYkzU C5Zw== X-Gm-Message-State: AMke39l629oyfWGmGMaDtyG3a0F9uvb+uyInO/eKMGuoXXKmFBtn5MhRLS4Tk8lDnfViRg== X-Received: by 10.99.189.9 with SMTP id a9mr44008800pgf.190.1489504714582; Tue, 14 Mar 2017 08:18:34 -0700 (PDT) Received: from squirtle.lan ([2601:602:9400:8377:f0f2:a63b:2597:b3d9]) by smtp.gmail.com with ESMTPSA id m6sm39248277pfm.22.2017.03.14.08.18.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 14 Mar 2017 08:18:33 -0700 (PDT) From: Andrey Smirnov To: linux-pci@vger.kernel.org Cc: Andrey Smirnov , yurovsky@gmail.com, Lucas Stach , Bjorn Helgaas , Fabio Estevam , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 2/4] PCI: imx6: Do not wait for speed change on i.MX7 Date: Tue, 14 Mar 2017 08:18:25 -0700 Message-Id: <20170314151827.31248-3-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170314151827.31248-1-andrew.smirnov@gmail.com> References: <20170314151827.31248-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As can be seen from [1]: "...the different behavior between iMX6Q PCIe and iMX7D PCIe maybe caused by the different controller version. Regarding to the DOC description, the DIRECT_SPEED_CHANGE should be cleared after the speed change from GEN1 to GEN2. Unfortunately, when GEN1 device is used, the behavior is not documented. So, IC design guys run the simulation and find out the following behaviors: 1. DIRECT_SPEED_CHANGE will be cleared in 7D after speed change from GEN1 to GEN2. This matches doc’s description 2. set MAX link speed(PCIE_CAP_TARGET_LINK_SPEED=0x01) as GEN1 and re-run the simulation, DIRECT_SPEED_CHANGE will not be cleared; remain as 1, this matches your result, but function test is passed, so this bit should not affect the normal PCIe function. ..." imx6_pcie_wait_for_speed_change will report false failures for Gen1 -> Gen1 speed transition, so avoid doing that check and just rely on imx6_pcie_wait_for_link only. [1] https://community.nxp.com/message/867943 Cc: yurovsky@gmail.com Cc: Lucas Stach Cc: Bjorn Helgaas Cc: Fabio Estevam Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov --- drivers/pci/host/pci-imx6.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index 2f3f375..473bbdc 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -577,10 +577,21 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie) tmp |= PORT_LOGIC_SPEED_CHANGE; dw_pcie_writel_rc(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, tmp); - ret = imx6_pcie_wait_for_speed_change(imx6_pcie); - if (ret) { - dev_err(dev, "Failed to bring link up!\n"); - goto err_reset_phy; + if (imx6_pcie->variant != IMX7D) { + /* + * On i.MX7, DIRECT_SPEED_CHANGE behaves differently + * from i.MX6 family when no link speed transition + * occurs and we go Gen1 -> yep, Gen1. The difference + * is that, in such case, it will not be cleared by HW + * which will cause the following code to report false + * failure. + */ + + ret = imx6_pcie_wait_for_speed_change(imx6_pcie); + if (ret) { + dev_err(dev, "Failed to bring link up!\n"); + goto err_reset_phy; + } } /* Make sure link training is finished as well! */